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Device for realizing multi-mode clock reference source

A clock reference and multi-mode frequency divider technology, applied in the direction of electrical components, automatic power control, etc., can solve the problems that the clock reference source cannot be integrated in the chip system, increase equipment costs, etc., and achieve power consumption, area, and device cost savings Effect of low, high clock accuracy

Active Publication Date: 2018-03-30
苏州芯通微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Technical problem: Many traditional clock reference sources mainly used in electronic equipment and devices cannot be system integrated in the chip, and when the clock reference source is required to have a higher output frequency, it is necessary to use a frequency phase-locked loop circuit to achieve frequency multiplication function, thereby significantly increasing equipment cost

Method used

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  • Device for realizing multi-mode clock reference source
  • Device for realizing multi-mode clock reference source
  • Device for realizing multi-mode clock reference source

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0025] Figure 7 It is a realization block diagram of the multimode frequency divider of embodiment 1. The multi-mode frequency divider in this device is composed of three multi-mode frequency dividers, and there are 8 control bits respectively s3, s2, s1, c3, c2, c1, d2, d1. Among them, different logical combinations of the multi-mode frequency divider 1, the multi-mode frequency divider 2 and the multi-mode frequency divider 3 can realize N1, N2 and N3 frequency divisions respectively. The input frequency is f n , after frequency division, the final output frequency is f n / N (where N=N1*N2*N3). Figure 6 It is the circuit diagram of the multimode frequency divider of embodiment 1, and this frequency divider is by 4 D flip-flops (D1, D2, D3, D4), 3 inverters (1, 2, 3), 4 NOR Gates (21, 22, 23, 24), three NAND gates (31, 32, 33), and an XOR gate (41). After cascading three multi-mode frequency dividers, the frequency division coefficients that can be realized are 40, 48,...

Embodiment 2

[0029] Figure 9 It is the realization block diagram of the multimode frequency divider of embodiment 2. The multi-mode frequency divider in this device is composed of two multi-mode frequency dividers and a single-mode frequency divider, and has 6 control bits, namely s3, s2, s1, c3, c2, c1. The single-mode frequency divider is composed of two D flip-flops, which can realize frequency division by 4. The structure of the two multi-mode frequency dividers is the same as that of the multi-mode frequency divider in Embodiment 1.

[0030] Figure 10 It is a partial circuit diagram of the automatic frequency calibration unit in Embodiment 2. The control bits s3, s2, s1, c3, c2, and c1 are simultaneously used as digital input signals of the automatic frequency calibration unit, and two digital signals A2, A1 are output through the logic circuit, and the implementation of the output terminal A1 is the input signal of the inverter 15 The output signal of the NAND inverter 16 is use...

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Abstract

The invention discloses a device for realizing a multi-mode clock reference source. The device is composed of a controlled frequency generator, a high-quality factor multi-band frequency selection network, a multi-mode frequency divider, an automatic frequency calibration unit, and a digital signal to analog signal converter. Consists of five parts. The device can realize the clock reference source function of the multi-mode output frequency by setting its control bit. While the control bit selects the frequency division coefficient of the multi-mode frequency divider, the automatic frequency calibration unit generates a digital control bit, and controls the working state of the controlled frequency generator after a digital signal to analog signal converter. The output of the controlled frequency generator passes through the high-quality factor multi-band frequency selection network and is used as the input of the multi-mode frequency divider for frequency division, and then the frequency division output is sent to the automatic calibration unit again, and the calibrated clock output is the whole device The final output is used as a clock reference source for other electronic devices. The invention has the advantages of simple structure, high clock precision, easy realization, low cost and the like; it can replace the traditional clock reference source device and is widely used in electronic equipment requiring clock control.

Description

technical field [0001] The invention is a device for realizing a multi-mode clock reference source, which mainly provides accurate reference clocks for devices in various electronic fields such as communications, test instruments, and consumer electronic equipment. Background technique [0002] With the rapid development of modern communication, control and integrated circuit technology, high stability and high precision clock reference source has become one of the key components to determine the performance of various electronic systems. Especially in consumer electronic devices, continuous cost reduction has also become a direct driving force for technological development and breakthroughs. In the increasingly integrated electronic devices, the traditional clock reference source has become a bottleneck, and cannot meet the requirements of modern electronic equipment and devices in terms of manufacturing, packaging process, cost and technical performance. The technical rea...

Claims

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Application Information

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IPC IPC(8): H03L7/24
Inventor 赵文虎
Owner 苏州芯通微电子有限公司
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