Method for manufacturing printed circuit board by using novel and improved semi-additive process
A printed circuit board, semi-additive technology, applied in the direction of multi-layer circuit manufacturing and the formation of electrical connection of printed components, can solve the problems of reduced reliability of circuit boards, reduced thickness of electroplated copper layers, and high cost. The effect of flash erosion and thickness reduction
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Embodiment 1
[0065] see Figure 16 ~ Figure 25 , the present invention is based on an improved semi-additive method, and the copper foil with low roughness (Rz less than 4 μm) of the laminated rough surface (copper foil has a smooth surface and a rough surface, wherein the rough surface is laminated with a dielectric layer) is thinned to 0.2-5μm, forming a thinned copper foil with Rz less than 4μm, and after pattern electroplating, use a metal protection layer to protect the circuit pattern and through holes, and remove the protection layer after flash etching.
[0066] The specific steps are:
[0067] Step 1, such as Figure 16 As shown, a dielectric layer 1 is prepared first, and a conductive layer 2 of copper foil with Rz less than 4 μm is hot-pressed on the dielectric layer 1 . The dielectric layer 1 can be fabricated on a composite substrate including an insulating carrier and a surface conductive layer, or can be directly fabricated on a conductive layer. In this embodiment, the d...
Embodiment 2
[0079] The first step to the sixth step are the same as in Example 1.
[0080] Step 7, see Figure 22 , continue to electroplate the substrate 3 containing the electroplating barrier layer 7, and then electroplate a layer of metal protective layer 10-bright nickel on the circuit pattern and the through hole, such as Figure 22 As shown, the metal protection layer 10 is electroplated bright nickel, and the thickness of the bright nickel is 3 μm.
[0081] Step 8, see Figure 23 , remove the plating stop layer 7.
[0082] Step 9, see Figure 24 , remove the exposed seed layer and the redundant copper foil conductive layer, retain the circuit pattern and the through hole 5, and form the required conductive pattern. The method of removing the bare seed layer and the conductive layer of copper foil adopts chemical etching. In this embodiment, the bare seed layer and the conductive layer are removed by flash etching, and the flash etching solution is a mixture of sulfuric acid a...
Embodiment 3
[0086] The first step to the sixth step are the same as in Example 1.
[0087] Step 7, see Figure 22 , the substrate 3 containing the electroplating barrier layer 7 is continued to be electroless plated, and a metal protection layer 10--silver is plated on the circuit pattern and the through hole again, such as Figure 22 As shown, the metal protective layer 10 is electroless plated silver, and the thickness of the silver is 0.15 μm.
[0088] Step 8, see Figure 23 , remove the plating stop layer 7.
[0089] Step 9, see Figure 24 , remove the exposed seed layer and redundant copper foil conductive layer, retain the circuit pattern and the through hole 5, and form the required circuit pattern. The method of removing the bare seed layer and the conductive layer of copper foil adopts chemical etching. In this embodiment, the bare seed layer and the copper foil conductive layer are removed by flash etching, and the flash etching solution is a mixture of sulfuric acid and hy...
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