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Method for Improving Uniformity of Deep Groove Chemical Mechanical Polishing

A chemical-mechanical, deep trench technology, used in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as easy connection, and achieve the effect of avoiding residues

Active Publication Date: 2017-10-24
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Through the method of the present invention, it can be solved that when the pitch of the p-type and n-type semiconductor pillars is reduced, the overgrown epitaxial layer above the surface of the stop layer is easily connected to cause a loading effect on the subsequent chemical mechanical polishing process (loading effect)

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  • Method for Improving Uniformity of Deep Groove Chemical Mechanical Polishing
  • Method for Improving Uniformity of Deep Groove Chemical Mechanical Polishing
  • Method for Improving Uniformity of Deep Groove Chemical Mechanical Polishing

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Embodiment Construction

[0040] The method for improving the chemical mechanical polishing uniformity of deep grooves (especially super junction deep grooves) of the present invention (such as Figure 4 shown), including the steps to:

[0041] 1) Using low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD) or atmospheric pressure chemical vapor deposition (APCVD), deposit a layer of oxide film with a thickness of 10 to 200 nanometers on the silicon substrate. Membrane 31 (i.e. silicon oxide);

[0042] The oxide film 31 serves as a barrier layer for subsequent mechanochemical mechanical polishing.

[0043] 2) Deposit a layer of sacrificial layer 32 (such as Figure 5 shown), wherein the material of the sacrificial layer 32 is a nitride film or an oxynitride film;

[0044] In order to keep the thickness of the stop layer unaffected, this layer of sacrificial layer 32 is specially introduced. Its function is to control the height of the epitaxial layer not to...

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Abstract

The invention discloses a method for improving the chemical mechanical polishing uniformity of a deep trench. The method comprises the following steps: (1), an oxide film layer is deposited on a silicon substrate; (2), a sacrificial layer is deposited on the surface of the oxide film and made of a nitride film or a nitrogen oxide film; (3), the deep trench is subjected to photoetching and etching; (4), the sacrificial layer is laterally etched through wet etching; (5), selective epitaxial layer growth is performed in the deep trench; (6), the sacrificial layer is removed through wet etching; (7), the oxide film is taken as a stop layer for chemical mechanical polishing. The method can solve the problem of a loading effect on follow-up chemical mechanical polishing technology due to high probability of connection of overgrown epitaxial layers higher than the surface of the stop layer when the pitches of p-type and n-type semiconductor columns are reduced, so that residues generated by the loading effect are avoided.

Description

technical field [0001] The invention relates to a method for improving groove polishing in the field of semiconductor integrated circuits, in particular to a method for improving the uniformity of deep groove chemical mechanical polishing. Background technique [0002] Deep trenches are often used in super junction MOS transistors (super junction MOSFETs), as a PN junction achieves high breakdown voltage performance through charge balance in the depletion state. The method of etching and filling deep trenches in the manufacturing process of super junction MOS transistors is to grow an n-type epitaxial layer (single crystal silicon) on a p-type silicon substrate, and then etch deep trenches on the epitaxial layer, The deep trench is then filled with p-type monocrystalline silicon, and finally the surface is planarized using a chemical mechanical polishing (CMP) process. At this time, the deep trench structure is used as a p-type semiconductor column, and both sides of the de...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/306H01L21/304
CPCH01L21/02521H01L21/30625
Inventor 程晓华钱志刚
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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