Inverter of gate integrated drive circuit, gate integrated driver and driving method

Abstract

The invention discloses an inverter of a gate integrated driving circuit, which comprises transistors T1v-T5v and a coupling capacitor C1v, the second electrode of T1v and the second electrode of T3v are connected to a positive level VDD, and the gate of T1v and the first electrode are both Connect the second electrode of T2v, the gate of T3v, the first electrode of T5v and one end of C1v; the gate of T2v and the gate of T4v are connected to the control signal, the gate of T5v and the second electrode are connected to the feedback signal RSTv, and the first electrode of T2v One electrode and the first electrode of T4v are connected to the first negative level, and the second electrodes of T3v and T4v are connected to the other end of C1v to form an inverter output node QBv. The invention also discloses a gate integrated driving circuit including the above-mentioned inverter and a driving method thereof. The invention realizes low power consumption, low noise and good anti-interference ability, and the pull-up transistor and the inverter of the output stage act quickly, and can realize working at a higher frequency.

Description

technical field [0001] The invention relates to gate drive technology of flat panel displays, in particular to an inverter of a gate integrated drive circuit, a gate integrated driver and a driving method. Background technique [0002] In recent years, oxide thin film transistors have received great attention, which have the characteristics of high mobility, good consistency and stable electrical properties, and the preparation cost is low. Integrating the gate driving circuit on the display is beneficial to reduce the cost of the display device and realize the thin and light design of the display device with a narrow frame. However, only N-type oxide thin film transistors can be used in circuit design, and when the gate-source voltage is zero and the source-drain voltage is greater than zero, it cannot be completely turned off, and leakage current still flows. [0003] In the gate drive circuit, the module circuit that provides the control signal of the pull-down transisto...

AI Technical Summary

Problems solved by technology

The traditional inverter is composed of a diode-connected transistor and a large-sized pull-down transistor. When the traditional inverter outputs a low level, there is a large DC loop, and due to the voltage drop on the pull-down transistor, the output of the inverter cannot minimum level reached

The clock-controlled inverter, which consists of a pull-down transistor and a clock-controlled pull-up transistor, will bring large dynamic power consumption due to the use of a clock signal, and when the clock signal goes low, the pull-up transistor will be completely turned off. At this time, for the circuit using oxide TFTs, the pull-down transistor still has a leakage current flowing. In order to keep the output of the inverter at a high level, a larger capacitor is required to maintain the voltage, which increases the circuit size. the area of

[0004] In the gate drive circuit, the more clock lines, the greater the load capacitance on the clock line, the higher the frequency, the greater the dynamic power consumption, and if the clock load differs greatly, it is easy to cause clock drift

Since the circuit maintains a low-level output time much longer than a high-level output time, multiple clocks will increase circuit noise and cause large fluctuations in the output voltage

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