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PCB processing method and PCB

A processing method and sub-board technology, which are applied in the mechanical removal of conductive materials, the formation of electrical connection of printed components, and the formation of printed circuits, which can solve problems such as poor control of short posts and space limitations for outgoing wires.

Active Publication Date: 2015-07-01
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, the spacing of the wafer limits the space for wiring in the PCB.
In the process of researching the present invention, the inventor found that there are at least the following problems in the prior art: 1. After the connector model is determined, the space for outgoing lines between wafers on the PCB is limited
2. With through-hole crimping, the deeper the back-drilling, the greater the depth tolerance of the back-drilling hole, and the worse the control of the stub

Method used

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  • PCB processing method and PCB

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Embodiment Construction

[0027] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0028] As mentioned above, the connector installation in the prior art adopts the crimping method, and all the crimping holes are designed as through holes. The disadvantage of this method is that the distance between the two wafers of the connector is very close, resulting in a small space for the connector to go out. If you want to increase the outlet space, you have to sacrifice the density of the connector. In order to solve th...

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Abstract

Disclosed are a PCB processing method and a PCB. The method comprises: conducting lamination processing on various layers of PCB sub-boards respectively forming a PCB according to PCB design requirements, and conducting hole drilling and electroplating on the PCB sub-boards of the uppermost layer of the PCB to form a via hole; and laminating the various layers of PCB sub-boards together to form the PCB, the via hole forming a blind hole used for installing a connector, and conducting hole drilling and electroplating on the formed PCB to form a through hole used for installing the connector, wherein the depth of the blind hole is greater than or equal to the length of a signal pin of the connector. By means of the technical solution of the present invention, the spacing between wafers among the lower layers of the PCBs can be doubled, so that the line outlet space between the wafers can be doubled.

Description

technical field [0001] The invention relates to the technical field of PCBs, in particular to a PCB processing method and a PCB. Background technique [0002] In the case of increasing user data traffic, the assembly method of a printed circuit board (PCB for short) plus a connector has been widely used in communication systems to realize signal connection between boards. The capacity of a typical switching system reaches 10T, and the number of connectors used is as many as several hundred. In order to meet the high communication capacity and install so many single boards and connectors in a limited cabinet, very high requirements are put forward for the density of connectors and the speed of a single channel. At present, the single-channel rate of the connector has been increased to more than 25Gbps, and the distance between the connector wafers is only 1.85mm. To further increase the rate of a single channel of the connector, the density of the connector can only be sacr...

Claims

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Application Information

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IPC IPC(8): H05K3/46H05K3/42H05K1/02H05K1/11
CPCH05K1/00H05K3/04H05K1/0298H05K1/115H05K3/429H05K3/4611H05K2201/10303H05K3/4623H05K2203/0207H05K1/09H05K3/0047H05K3/424H05K2203/16
Inventor 易毕任永会熊旺王迎新
Owner ZTE CORP
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