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Device and method for testing integrated circuit plate and integrated circuit metal layer

An integrated circuit board, integrated circuit technology, applied in circuits, semiconductor/solid-state device testing/measurement, electrical components, etc., can solve problems such as low accuracy and low efficiency, and achieve improved accuracy, improved detection efficiency, and reduced labor. cost effect

Active Publication Date: 2015-08-12
FOUNDER MICROELECTRONICS INT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] At present, there is no test structure for the metal layer. The existing detection of the metal layer uses a visual inspection method to confirm whether the metal layer is normal, such as using a microscope, but this method is greatly affected by human subjective factors, resulting in accuracy low, and the efficiency of this detection method is very low

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  • Device and method for testing integrated circuit plate and integrated circuit metal layer
  • Device and method for testing integrated circuit plate and integrated circuit metal layer
  • Device and method for testing integrated circuit plate and integrated circuit metal layer

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Embodiment Construction

[0046]In order to solve the technical problem of low detection accuracy and low efficiency of the metal layer of an integrated circuit in the prior art, the present invention provides a test structure, device and method for a metal layer of an integrated circuit. In this technical solution, the embodiment of the present invention designs the test structure of the metal layer, and based on the test structure of the metal layer, the first strip-shaped polysilicon resistor and the plurality of metal strips partially covered by the large-size metal plate in the test structure are partially covered. The square resistance of the second strip-shaped polysilicon resistor is tested to obtain the first resistance value and the second resistance value, and according to the relative change of the first resistance value and the second resistance value, it is determined that the metal plate and the metal strip are made on the same layer Whether there is an abnormality in the metal layer, thr...

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Abstract

The invention relates to the technical field of a semiconductor integrated circuit, and discloses a device and a method for testing an integrated circuit plate and an integrated circuit metal layer. The integrated circuit plate comprises scribing grooves, and testing structures, located in the scribing grooves, of the integrated circuit metal layer. Each testing structure comprises: a first strip-shaped polycrystalline silicon resistor; a metal plate located on and in cross arrangement with the first strip-shaped polycrystalline silicon resistor, wherein the length and width of the metal plate are no less than 10 microns; a second strip-shaped polycrystalline silicon resistor; and a plurality of metal strips located on and in cross arrangement with the second strip-shaped polycrystalline silicon resistor, wherein the plurality of metal strips are arranged in parallel at intervals, and the width of each metal strip is no larger than 3 microns. The metal plate, the metal strips, and the integrated circuit metal layer are located at the same layer and are prepared at the same layer. By adopting the technical scheme in the invention, the metal layer is tested via an electrical performance test, so that the test accuracy of the metal layer is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, in particular to an integrated circuit board, a test device and method for an integrated circuit metal layer. Background technique [0002] In integrated circuits, metal layers are used for interconnection between devices, as well as pads for package bonding. Among these metal layer structures, some are large-sized metal plates, and some are small-sized. Metal strips (or blocks of metal of small size), some arranged in isolation, some arranged in dense arrangements. [0003] The manufacture of integrated circuits includes the front-end process and the back-end process. The front-end process is a series of process steps implemented on the semiconductor wafer, including photolithography, etching, thin film, metallization, diffusion, oxidation, alloy and other processes. , the manufacturing process of the metal layer belongs to the front-end process; the back-end process o...

Claims

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Application Information

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IPC IPC(8): H01L23/544H01L21/66
Inventor 潘光燃文燕王焜石金成高振杰
Owner FOUNDER MICROELECTRONICS INT