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Capacitor-carried power supply ground plane modeling and capacitor decoupling radius simulating method

A technology of power supply ground plane and capacitor power supply, which is applied in the electronic field, can solve the problem that the resonator cannot model the ground plane of the load power supply, and achieve the effect of ensuring calculation accuracy and improving calculation efficiency

Active Publication Date: 2015-09-23
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the above-mentioned technical problems, the present invention provides a ground plane modeling method with a capacitor power supply and a method for simulating the capacitance decoupling radius. question

Method used

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  • Capacitor-carried power supply ground plane modeling and capacitor decoupling radius simulating method
  • Capacitor-carried power supply ground plane modeling and capacitor decoupling radius simulating method
  • Capacitor-carried power supply ground plane modeling and capacitor decoupling radius simulating method

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Embodiment 1

[0035] Embodiment 1: the present invention is a kind of ground plane modeling and capacitive decoupling radius emulation method with capacitive power supply, see figure 1 , including the following steps:

[0036] (1) Use the port P for the position of the input / output port on the power ground plane 0 marked, the location of the decoupling capacitor on the power ground plane is marked with port P 1 , P 2 ,...,P α mark, where α is the number of decoupling capacitors terminated on the power ground plane, and record the coordinates of the decoupling capacitors and the positions of the input / output ports respectively, see Figure 2(a), image 3 , Figure 4 , Figure 13(a).

[0037] (2) The coordinates of the decoupling capacitor k=1,2,…,α, coordinates of input / output ports The length a of the power supply ground plane, the width b and the interval d between the power supply plane and the ground plane are substituted into the resonant cavity formula, and the frequency domain ...

Embodiment 2

[0045] Embodiment 2: ground plane modeling with capacitance power supply and capacitance decoupling radius simulation method, with embodiment 1, refer to Figure 5 , calculating the effective decoupling radius of the decoupling capacitor in step (5) includes the following steps:

[0046] 5.1) Calculate the frequency-domain impedance distribution of the power ground plane after adding decoupling capacitors by using the closed resonant cavity formula with a capacitive power ground plane;

[0047] 5.2) According to the performance requirements of the actual circuit, set the target impedance. Since the circuit structure in this example does not involve specific circuit design, set the target impedance to 1Ω;

[0048] 5.3) Scan the frequency-domain impedance distribution of the entire power ground plane in the circuit board, and mark the area where the impedance amplitude is smaller than the target impedance as an effective decoupling area, see Figure 5 , the area with impedance ...

Embodiment 3

[0050] Embodiment 3: ground plane modeling with capacitance power supply and the emulation method of capacitance decoupling radius are the same as embodiment 1-2, wherein in step (2), on the basis of power ground plane resonator formula, calculate the value of each resonant mode of power ground plane Frequency domain response and port coefficients for each port. Any two ports P on the power ground plane i and P j The resonant cavity formula between is shown in the following formula:

[0051] Z P i P j ( ω ) = Σ n = 0 ∞ Σ m = 0 ∞ N mnP ...

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Abstract

The invention discloses a capacitor-carried power supply ground plane modeling and capacitor decoupling radius simulating method. The method includes the steps of recording coordinates of an input / output port and a decoupling capacitor port, calculating port coefficients and frequency domain responses of all resonance modes according to a resonant cavity formula or based on a double-frequency-point approximation algorithm resonant cavity formula, obtaining all capacitor division schemes according to the port coefficients, the frequency domain responses of all the resonance modes, the number of the modes, the capacitor frequency domain responses and the number of capacitors, converting the divided capacitors into a power supply ground plane resonant cavity model to obtain a capacitor-carried power supply ground plane resonant cavity formula, calculating power supply ground plane actual frequency domain impedance distribution through the resonant cavity formula, and extracting the capacitor decoupling radius on the basis of the impedance distribution. By means of the method, the problem that capacitor-carried power supply ground plane modeling can not be conducted through a resonant cavity algorithm is solved, a rapid, easy and convenient method is provided for load-carried power supply ground plane modeling, and reliable guidance is provided for selection and placement of the decoupling capacitors in power supply integrity design through the decoupling radius.

Description

technical field [0001] The invention belongs to the field of electronic technology, and relates to the modeling and calculation of a resonant cavity model with a ground plane with a capacitor power supply and the effective decoupling radius of a capacitor, in particular to a ground plane modeling with a capacitor power supply and a simulation method for a capacitor decoupling radius, which is used for calculating the Frequency Domain Impedance and Resonant Modes of Capacitive Power Ground Plane and Aided Design of Decoupling of Distributed Power Distribution Networks in High Speed ​​Circuit Boards. Background technique [0002] As the I / O lines travel from chip to chip, the interconnect and power distribution network interact to generate power noise. With the continuous improvement of the clock frequency and integration of digital circuits, the power supply noise generated in the power distribution network seriously limits the improvement of circuit performance. The power g...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 路建民王君任学施李先锐初秀琴刘洋
Owner XIDIAN UNIV
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