Method for forming semiconductor device

Abstract

A method for forming a semiconductor device comprises a step of providing a substrate whose surface has gate structures, wherein two sides of each gate structure has an interconnection region respectively, portions, in the interconnection regions, of the substrate have source regions and drain regions positioned at two sides of the corresponding gate structure respectively, and surfaces of the substrate and the gate structures have a first dielectric layer; a step of forming a barrier opening on the surface of the first dielectric layer, wherein the pattern of the barrier opening at least penetrates one interconnection region; a step of forming a barrier layer in the barrier opening; a step of forming a first patterned layer on the first dielectric layer and the surface of the barrier layer, wherein the first patterned layer exposes the positions of the interconnection regions; a step of taking the first patterned layer and the barrier layer as mask layers, and etching the first dielectric layer until the surface of the substrate in the interconnection regions is exposed, so as to form source-drain grooves; a step of forming gate through holes in the first dielectric layer for exposing tops of the gate structures; and a step of forming source-drain conductive structures in the source-drain grooves and forming gate plugs in the gate through holes. The formed semiconductor device is good in appearance and has improved performances.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor device. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short-channel effect of the transistor and suppress the leakage current, a Fin Field Effect Transistor (Fin FET) is proposed in t...

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Problems solved by technology

[0005] However, with the shrinking of process nodes, the size of FinFETs shrinks and the

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