Method for forming semiconductor device

A semiconductor and device technology, applied in the field of semiconductor device formation, can solve the problems of shrinking the size of fin field effect transistors, increasing the difficulty of the fin field effect transistor process, increasing device density, etc., and achieves good appearance and simplified formation method. , size-accurate effect

Active Publication Date: 2015-10-14
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology

[0005] However, with the shrinking of process nodes, the size of FinFETs shrinks and the

Method used

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  • Method for forming semiconductor device
  • Method for forming semiconductor device
  • Method for forming semiconductor device

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Example Embodiment

[0035] As described in the background art, with the shrinking of process nodes, the size of the fin-type field effect transistor is reduced and the device density is increased, which makes the process of forming the fin-type field effect transistor increasingly difficult.

[0036] After research, it is found that as the process nodes shrink, the space used to form the conductive structure on the surface of the source region, the drain region or the gate layer also shrinks, making the formation of the conductive structure more difficult, and the formed conductive structure The appearance is poor.

[0037] Please refer to figure 1 , figure 1 It is a schematic diagram of the top view structure of a fin-type field effect transistor, including: a substrate (not shown); a number of parallel fins 101 arranged in an array on the surface of the substrate; on the surface of the substrate and covering part of the fin 101 side The dielectric layer 102 of the wall; the gate structure 103 stradd...

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Abstract

A method for forming a semiconductor device comprises a step of providing a substrate whose surface has gate structures, wherein two sides of each gate structure has an interconnection region respectively, portions, in the interconnection regions, of the substrate have source regions and drain regions positioned at two sides of the corresponding gate structure respectively, and surfaces of the substrate and the gate structures have a first dielectric layer; a step of forming a barrier layer on the surface of the first dielectric layer, wherein the material of the barrier layer is different from that of the first dielectric layer, and the pattern of the barrier layer at least penetrates one interconnection region; a step of forming a first patterned layer with a first opening on the first dielectric layer and the surface of the barrier layer, wherein the first opening exposes the positions of the interconnection regions; a step of taking the first patterned layer and the barrier layer as mask layers, and etching the first dielectric layer until the surface of the substrate in the interconnection regions is exposed, so as to form source-drain grooves; a step of forming gate through holes in the first dielectric layer for exposing tops of the gate structures; and a step of forming source-drain conductive structures in the source-drain grooves and forming gate plugs in the gate through holes. The formed semiconductor device is good in appearance and has improved performances.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor device. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short-channel effect of the transistor and suppress the leakage current, a Fin Field Effect Transistor (Fin FET) is proposed in t...

Claims

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Application Information

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IPC IPC(8): H01L21/336
Inventor 傅丰华
Owner SEMICON MFG INT (SHANGHAI) CORP
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