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Wafer bonding method

A wafer and bonding technology, which is applied to the photolithographic process of the patterned surface, the process for producing decorative surface effects, decorative art, etc., can solve the problems of lower product yield and cracks on the side wall, and achieve Improve the yield, avoid cracking, and ensure the effect of effectiveness

Active Publication Date: 2016-01-27
WUHAN XINXIN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the warping of the wafer bonded edge, in the subsequent processing process, when the upper wafer is thinned, cracks and other defects are prone to appear on the wafer bond or sidewall, which greatly reduces the yield of the product

Method used

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specific Embodiment approach

[0043] A specific embodiment is listed: this embodiment is only an embodiment of the present invention, and is not intended to specifically limit the present invention.

[0044] Such as Figure 2a As shown, two wafers to be bonded are provided. Here, for the convenience of description, the two wafers are respectively referred to as a first wafer and a second wafer.

[0045] Such as Figure 2b As shown, first, the bonding layers of the two wafers are bonded to each other. That is, the bonding layer of the first wafer is bonded and connected to the bonding layer of the second wafer.

[0046] Such as Figure 2c As shown, thinning treatment is performed on the surface of the first wafer at the upper end to remove the silicon deposition layer with a predetermined thickness. At the same time, during the thinning process, a retracted incision chamfer is produced on the bonding layer. The retracted type The shape of the notch chamfer is different due to the different processes use...

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Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer bonding method. The method comprises the following steps: providing a first wafer and a second wafer, wherein the first wafer and the second wafer comprise silicon substrates and metal layers arranged on the silicon substrates; preparing coating layers on the first wafer and the second wafer, and bonding the first wafer on the second wafer in order to form bonded wafers; performing a thinning process on the first wafer; cutting edge regions of the bonded wafers in order that the metal layers of the edge regions are exposed out; and depositing protection layers on exposed surfaces of the metal layers. The coating layers on the edge regions of the two wafers are cut to form flattened side walls. Meanwhile, the release of stresses inside the wafers is facilitated, thereby avoiding warping of wafer edges due to the release of the stresses inside the wafers in an encapsulation process. The surfaces of the bonded wafers are in completely-flat states, so that the bonding effectiveness is enhanced; cracks on edges and side walls of the bonded wafers are eliminated; and the product yield is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer bonding method. Background technique [0002] Wafer bonding technology refers to the method of tightly combining two wafers through chemical and physical effects. Wafer bonding is often combined with surface silicon processing and bulk silicon processing, and is used in the processing technology of MEMS. Although wafer bonding is not a direct means of micromachining, it plays an important role in micromachining. By combining with other processing methods, it can not only provide support and protection for microstructures, but also realize the mechanical structure between mechanical structures or mechanical structures. An electrical connection to a circuit. The quality of wafer bonding will have a direct impact on the performance of the micromechanical system, and the warpage of the wafer before and after bonding is one of the main factors affecting th...

Claims

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Application Information

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IPC IPC(8): B81C3/00B81C1/00
Inventor 穆钰平周玉曹静胡胜孙鹏
Owner WUHAN XINXIN SEMICON MFG CO LTD