Method and system for optimizing analogue integrated circuit

A technology of integrated circuits and optimization methods, which is applied in the fields of electrical digital data processing, instruments, calculations, etc., and can solve problems such as circuit yield decline and manufacturing process precision difficulties

Active Publication Date: 2016-02-03
中科芯云微电子科技有限公司
View PDF2 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] For such a complex design, it is almost impossible to find the optimal design through the traditional design method based on experience and a large number of iterations, especially in the small-scale nanotechnology, its manufacturing processes (such as photolithography, ion implantation,

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method and system for optimizing analogue integrated circuit
  • Method and system for optimizing analogue integrated circuit
  • Method and system for optimizing analogue integrated circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0045] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0046] In the traditional rapid design and optimization methods of analog integrated circuits, it is still difficult to use the yield rate as an optimization constraint or optimization goal in the optimization process. The main reason is that the accurate estimation of the circuit yield rate is obtained by Monte Carlo analysis of the SPICE model (mainly the BSIM model of CMOS transistors) provided by the chip foundry with process statistics information. Monte Carlo...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The embodiment of the invention discloses a method and system for optimizing an analogue integrated circuit. According to the method, a circuit-stage analogue program is adopted for simulating a new-generation population, the circuit performance indexes of all individuals in the new-generation population are obtained, and meanwhile an SPICE simulator is utilized for carrying out Monte Carlo analytical estimating on the new-generation population to obtain a yield estimated value through an SPICE model and Gaussian process regression. The circuit performance indexes and the yield participate in an evolution algorithm as constraint conditions at the same time in the population evolution process, and therefore the problem that in the prior art, the yield is low in the final decision making process is solved.

Description

technical field [0001] The present invention relates to the technical field of Electronic Design Automation (EDA), more specifically, to an analog integrated circuit optimization method and system. Background technique [0002] With the continuous advancement of integrated circuit technology to nano-scale advanced node technology, the challenges faced by analog integrated circuit design are also more prominent. On the one hand, the application requirements require that the analog integrated circuit unit has more complex functions, better performance, smaller area and lower power consumption. For example, the radio frequency circuit unit used for 4G communication may need to be compatible with various standards such as LTE, GSM, and Bluetooth, and at the same time require a smaller area and lower power consumption. Therefore, designers need to consider multiple design goals with constraints at the same time, for example, these goals may include: circuit performance, power co...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F17/50
Inventor 孙建伟陈岚王海永
Owner 中科芯云微电子科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap