Method and system for optimizing analogue integrated circuit

Abstract

The embodiment of the invention discloses a method and system for optimizing an analogue integrated circuit. According to the method, a circuit-stage analogue program is adopted for simulating a new-generation population, the circuit performance indexes of all individuals in the new-generation population are obtained, and meanwhile an SPICE simulator is utilized for carrying out Monte Carlo analytical estimating on the new-generation population to obtain a yield estimated value through an SPICE model and Gaussian process regression. The circuit performance indexes and the yield participate in an evolution algorithm as constraint conditions at the same time in the population evolution process, and therefore the problem that in the prior art, the yield is low in the final decision making process is solved.

Description

technical field [0001] The present invention relates to the technical field of Electronic Design Automation (EDA), more specifically, to an analog integrated circuit optimization method and system. Background technique [0002] With the continuous advancement of integrated circuit technology to nano-scale advanced node technology, the challenges faced by analog integrated circuit design are also more prominent. On the one hand, the application requirements require that the analog integrated circuit unit has more complex functions, better performance, smaller area and lower power consumption. For example, the radio frequency circuit unit used for 4G communication may need to be compatible with various standards such as LTE, GSM, and Bluetooth, and at the same time require a smaller area and lower power consumption. Therefore, designers need to consider multiple design goals with constraints at the same time, for example, these goals may include: circuit performance, power co...

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Problems solved by technology

[0003] For such a complex design, it is almost impossible to find the optimal design through the traditional design method based on experience and a large number of iterations, especially in the small-scale nanotechnology, its manufacturing processes (such as photolithography, ion implantation, oxidation, Chemical mechanical polishing, etc.) precision control becomes very difficult. In the case of significant and unavoidable process fluctuations, failure to correctly evaluate the impact of process fluctuations on the circuit will lead to a decline in yield and delay in product launch.

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