Semiconductor device based on double patterns and manufacturing method thereof, and electronic device

Abstract

The invention relates to a semiconductor device based on double patterns and a manufacturing method thereof, and an electronic device. The method comprises steps that, S1, a semiconductor substrate is provided, a mask lamination layer is formed on the semiconductor substrate, and the mask lamination layer comprises an upmost patterned siliceous photoresist layer; S2, an oxygen-based plasma is selected for oxidation treatment on the siliceous photoresist layer to form an oxide layer on the surface of the siliceous photoresist layer, and the non-oxidized siliceous photoresist layer forms a photoresist core; S3, re-etching on the oxide layer is carried out to expose the photoresist core; S4, the photoresist core is removed to form an opening in the oxide layer; and S5, the semiconductor substrate is etched by taking the oxide layer as a mask, and the pattern is transferred to the semiconductor substrate. The semiconductor device is advantaged in that, (1), performance of a side wall of the acquired pattern is better, and stress of a deposited CVD film exerted on the side wall of the photoresist can be avoided.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular, the invention relates to a semiconductor device based on a double pattern, a manufacturing method thereof, and an electronic device. Background technique [0002] With the increasing demand for high-capacity semiconductor storage devices, the integration density of semiconductor storage devices has attracted people's attention. In order to increase the integration density of semiconductor storage devices, many different methods have been adopted in the prior art. The continuous shrinkage of the device, the double-patterning technology (Double-Patterning, DP) is being widely accepted and applied as a solution in the device preparation process. [0003] Double-patterning (DP) technology overcomes the K1 limitation through pitch fragmentation, and thus is widely used in the preparation of semiconductor devices. At present, in Double-Patterning (DP) technology, there are sel...

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Problems solved by technology

[0005] In the SADP process, the photoresist is usually selected and patterned as the core (core) in the double pattern, and the low-temperature deposition method is used to form a spacer layer on the photoresist core, and the spacer layer is used in the deposition process. The photoresist core produces a certain stress, which leads to a decrease in the performance of the sidewall of the photoresist core, or even deformation, thereby affecting the transfer of the pattern, and ultimately affecting the performance and yield of the device

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