Pseudo-differential capacitive successive approximation register analog-digital converter

An analog-to-digital converter and successive approximation technology, applied in analog/digital conversion, code conversion, instruments, etc., can solve the problems of inaccurate double relationship and limit the improvement of SARADC accuracy, so as to save chip area, improve accuracy, double-relationship exact effect

Active Publication Date: 2016-03-02
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The parasitic resistance and parasitic capacitance of various devices and traces, as well as errors in the manufacturing process, ma...

Method used

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  • Pseudo-differential capacitive successive approximation register analog-digital converter
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  • Pseudo-differential capacitive successive approximation register analog-digital converter

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Embodiment Construction

[0033] Such as figure 1 Shown is the circuit diagram of the pseudo-differential capacitive successive approximation analog-to-digital converter of the embodiment of the present invention; the pseudo-differential capacitive successive approximation analog-to-digital converter of the embodiment of the present invention includes a first capacitor array 101, a second capacitor array 102, and a calibration capacitor array 105 , a comparator (COMP) 103 , a control logic circuit (SAR&CALLogic) 104 and a memory (CALMemory) 106 .

[0034]The output terminal PX of the first capacitor array 101 is connected to the first input terminal of the comparator 103 and connected to the common mode level VCM through a switch SP, and the output terminal NX of the second capacitor array 102 is connected to The second input terminal of the comparator 103 is connected to the common mode level VCM through a switch SN, and the first capacitor array 101 and the second capacitor array 102 form a pseudo-di...

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Abstract

The invention discloses a pseudo-differential capacitive successive approximation register analog-digital converter. The analog-digital converter comprises a first capacitor array, a second capacitor array, a calibration capacitor array and a comparator, wherein lower-bit-segment sub-capacitor arrays of the first capacitor array keep single-end structures; a higher-bit first-segment sub-capacitor array of the first capacitor array and the second capacitor array construct a differential structure; and the first capacitor array and the second capacitor array construct a pseudo-differential capacitor array in which single ends are combined with the differential structure. In an analog-digital conversion process, a transition code value is formed after completion of a least-significant differential weight bit, thereby realizing differential-single end transition. An output end of the calibration capacitor array is connected with an output end of the second capacitor array through a coupling capacitor, and the calibration capacitor array is used for calibrating mismatch of capacitors in the pseudo-differential capacitor array and the offset of the comparator. Through adoption of the analog-digital converter, the chip area can be saved; self-calibration can be performed; and the conversion accuracy is increased.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to a pseudo-differential capacitive successive approximation analog-to-digital converter. Background technique [0002] Successive approximation analog-to-digital converters (SARADC) are widely used in medical equipment, high-speed data acquisition systems, digital signal processing, spectrum analysis, industrial equipment, communications, and engines. [0003] Among them, an important component related to precision and speed - the digital-to-analog converter (DAC) plays a key role in dividing the reference voltage (Vref) into two. Pure capacitive analog-to-digital converter (CDAC) is widely used because of its low noise and high manufacturing precision. [0004] In some medium and high-precision SARADC applications, the bridge capacitor structure is generally used in the design, the purpose is to further reduce the number and size of the total unit capacitance of the CDAC in t...

Claims

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Application Information

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IPC IPC(8): H03M1/38
Inventor 张斌尹涛
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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