Pseudo-differential capacitive successive approximation register analog-digital converter

Abstract

The invention discloses a pseudo-differential capacitive successive approximation register analog-digital converter. The analog-digital converter comprises a first capacitor array, a second capacitor array, a calibration capacitor array and a comparator, wherein lower-bit-segment sub-capacitor arrays of the first capacitor array keep single-end structures; a higher-bit first-segment sub-capacitor array of the first capacitor array and the second capacitor array construct a differential structure; and the first capacitor array and the second capacitor array construct a pseudo-differential capacitor array in which single ends are combined with the differential structure. In an analog-digital conversion process, a transition code value is formed after completion of a least-significant differential weight bit, thereby realizing differential-single end transition. An output end of the calibration capacitor array is connected with an output end of the second capacitor array through a coupling capacitor, and the calibration capacitor array is used for calibrating mismatch of capacitors in the pseudo-differential capacitor array and the offset of the comparator. Through adoption of the analog-digital converter, the chip area can be saved; self-calibration can be performed; and the conversion accuracy is increased.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to a pseudo-differential capacitive successive approximation analog-to-digital converter. Background technique [0002] Successive approximation analog-to-digital converters (SARADC) are widely used in medical equipment, high-speed data acquisition systems, digital signal processing, spectrum analysis, industrial equipment, communications, and engines. [0003] Among them, an important component related to precision and speed - the digital-to-analog converter (DAC) plays a key role in dividing the reference voltage (Vref) into two. Pure capacitive analog-to-digital converter (CDAC) is widely used because of its low noise and high manufacturing precision. [0004] In some medium and high-precision SARADC applications, the bridge capacitor structure is generally used in the design, the purpose is to further reduce the number and size of the total unit capacitance of the CDAC in t...

AI Technical Summary

Problems solved by technology

[0006] The parasitic resistance and parasitic capacitance of various devices and traces, as well as errors in the manufacturing process, make the double relationship between the capacitances of adjacent bits of CDAC inaccurate, which greatly limits the improvement of SARADC accuracy.

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