Tunneling field effect transistor and manufacturing method thereof

Abstract

The present invention provides a tunneling field effect transistor. The tunneling field effect transistor comprises: a substrate; a drain region with a first doped type disposed on the substrate; a channel region arranged above the drain region; a source region with a second doped type arranged above the channel region; a drain region connection region, arranged on the substrate, connected with the side wall of the drain region; a gate dielectric layer arranged at the side walls of the source region, the drain region and channel region; a gate electrode arranged at the side wall of the gate dielectric layer; and an insulation layer between the gate electrode and the drain region connection region. According to the invention, a source region and a drain region are formed in the vertical direction of the substrate, and a tunneling field effect transistor with a vertical structure is formed; and moreover, the tunneling field effect transistor has smaller size of a device to satisfy the requirement of continuously decreased size of the device, so that the integration level is improved.

Description

technical field [0001] The invention relates to the field of semiconductor devices, in particular to a tunneling field effect transistor and a manufacturing method thereof. Background technique [0002] With the continuous shrinking of device size, the number of devices on a chip per unit area is increasing, which will lead to an increase in dynamic power consumption. At the same time, the continuous shrinking of device size will inevitably lead to an increase in leakage current, which in turn will cause an increase in static power consumption. . For traditional Metal Oxide Field Effect Transistor (MOSFET) devices, limited by carrier Boltzmann thermal distribution, the subthreshold swing (SS) of MOSFET devices must be greater than 60mV / decade, which seriously affects the The switching rate at the lower voltage causes the leakage current to increase exponentially with the decrease of the supply voltage, and thus the static power consumption increases exponentially. [0003]...

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Problems solved by technology

[0004] However, limited by the tunneling probability, the tunneling current of the traditional TFET is small. At the same time, because the doping type of the source and drain of the TFET is opposite, the traditional MOSFET self-alignment process is no longer applicable, resulting in the reduction of the planar TFET. Small device feature size has some disadvantages

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