Manufacturing method of lead frame structure
A manufacturing method and a technology of a lead frame, which are applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as incomplete electroplating, increased manufacturing costs, and easy formation of bubbles, etc., so as to improve the process quality High efficiency, lower production cost, and less consumables
Active Publication Date: 2019-03-19
CHIPMOS TECH INC
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Problems solved by technology
However, the adhesive tape 300 in this electroplating process is a consumable material and cannot be reused, which virtually increases the production cost. Moreover, this kind of process is easy to have residual glue remaining on the bottom surface 224 of the lead frame 220 due to incomplete removal of the adhesive tape 300. problem, or the bottom surface 224 of the lead frame 220 is also plated to
Furthermore, since the adhesive tape 300 is integrally attached to the bottom surface 224 of the lead frame 220, the gap G between the pins 226 is covered by the adhesive tape 300, so that the upper and lower sides of the lead frame 220 are impermeable, so air bubbles are easily formed. , and the bubbles in the electroplating solution are easy to accumulate between the gaps G between the pins 226 (such as figure 2 indicated by the dotted arrow), thus resulting in incomplete plating
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[0034] The aforementioned and other technical contents, features and effects of the present invention will be clearly presented in the following detailed descriptions of the embodiments with accompanying drawings. The directional terms mentioned in the following embodiments, such as "upper", "lower", "front", "rear", "left", "right", etc., are only the directions of the drawings. Accordingly, the directional terms used are illustrative, not limiting, of the invention. Also, in the following embodiments, the same or similar elements will be given the same or similar reference numerals.
[0035] Figure 1A to Figure 1F It is a schematic diagram of a manufacturing method of a lead frame structure according to an embodiment of the present invention. The manufacturing method of the lead frame structure of the present embodiment comprises the following steps: first, provide such as Figure 1A The metal substrate 110 is shown. For example, the metal substrate 110 can be a thin me...
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A manufacturing method of a lead frame structure includes the following steps. First, a metal substrate is provided. The metal substrate is then patterned to form a lead frame. The lead frame has a plating surface and a bottom surface. A carrier is provided, and a polymer coating layer is formed on the carrier. Next, the lead frame is disposed on the carrier such that the polymer coating layer coats the bottom surface to form a resist layer. Then, the carrier is removed. A plating process is performed on the lead frame by adopting the resist layer as a plating mask to form a metal plating layer on the plating surface. Last, the resist layer is removed. According to the invention, the plating layer is uniform and is formed on a lead frame structure on a plating surface only, and the technical yields can be improved; in addition, the carrier can be used repeatly, and the production cost can be reduced.
Description
technical field [0001] The invention relates to a manufacturing method of a lead frame structure, and in particular to a manufacturing method of forming a metal plating layer on a lead frame structure. Background technique [0002] In recent years, with the rapid development of electronic technology and the emergence of high-tech electronic industries, electronic products with more humanization and better functions are constantly being introduced, and are designed towards the trend of light, thin, short and small. As far as the technology of chip assembly is concerned, each bare chip (die) formed by dicing the wafer is configured by wire bonding or flip chip bonding, for example. On the surface of the carrier, where the carrier is, for example, a lead frame or a substrate, etc., and the active surface of the chip has a plurality of bonding pads, so that the bonding pads of the chip can be electrically connected to the carrier through the transmission lines and contacts of th...
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IPC IPC(8): H01L21/48H01L23/495
Inventor 石智仁
Owner CHIPMOS TECH INC