SiGe/Si epitaxial wafer growing method

Abstract

The invention relates to the technical field of semiconductor materials, and in particular to a SiGe / Si epitaxial wafer growing method. The method includes the following steps: providing and cleaning a single crystal Si substrate; arranging one carbon nano tube layer on the epitaxial growing surface of the single crystal Si substrate; forming a carbon-doped buffer layer on the surface of the carbon nano tube layer which contains less than 1 percent of carbons; forming a seed crystal buffer layer on the surface of the carbon-doped buffer layer; and forming a SiGe epitaxial layer on the surface of the seed crystal buffer layer. According to the invention, the method introduces the carbon nano tube layer and the carbon-doped buffer layer, which reduces dislocation in epitaxial growth and defects of the epitaxial wafer, and increases the quality of SiGe epitaxial wafers.

Description

[0001] Technical field: [0002] The invention relates to the technical field of semiconductor materials, in particular to a SiGe / Si epitaxial wafer growth method. Background technique [0003] In recent years, the optoelectronic properties and fluorescence properties of silicon-based IV-IV two-phase alloys have attracted extensive attention from the scientific community. Silicon-based materials, such as silicon-based germanium-silicon materials, have much higher carrier mobility than silicon. On the other hand, their device preparation process is compatible with the traditional silicon device process, so it has been highly valued by the research field and the industry. Among them, the germanium-silicon heterojunction has become one of the research hotspots. Carrier mobility has attracted much attention, and silicon germanium materials have shown a much higher hole mobility than existing silicon materials in research, which is very suitable for the preparation of PMOS devices ...

AI Technical Summary

Problems solved by technology

[0004] However, since the lattice constant of the germanium material is different from that of silicon, and there is a 4.2% lattice mismatch, epitaxial germanium directly on the silicon substrate will generate a large number of dislocations that penetrate to the surface to form defects, which greatly deteriorates the prepared MOS device. Performance, cannot be applied to the manufacture of semiconductor MOS devices