SCR (Semiconductor Control Rectifier) with high maintaining voltage for ESD (Electro-Static Discharge) protection

Abstract

The invention belongs to the technical field of electronic science and technology, is mainly used for a static discharge protection technology and specifically relates to an SCR (Semiconductor Control Rectifier) with a high maintaining voltage for ESD (Electro-Static Discharge) protection. An SCR device provided by the invention is used for ESD protection of a low voltage 5V technology, an additional NPN transistor is utilized to weaken a positive feedback process in the SCR structure, and then the current positive feedback of the SCR has a weakening trend, so that the SCR can maintain voltage boosting and can increase the anti-latch capacity of the device. Besides, even if the noise interference is generated by a chip and the SCR is mistakenly started by the noise voltage, the structure still can ensure the normal potential and normal transmission of the signal.

Description

technical field [0001] The invention belongs to the field of electronic science and technology, and is mainly used for electrostatic discharge (Electro Static Discharge, referred to as ESD) protection technology. SCR). Background technique [0002] ESD stands for Electrostatic Discharge, which is a common phenomenon in nature. [0003] With the innovation of integrated circuit manufacturing process, the thinner line width and even thinner oxide layer greatly reduce the antistatic ability of the chip, so the impact of static electricity on the circuit is more obvious. There are also contradictions between the development of deep submicron and even nanometer processes and the anti-ESD ability of integrated chips, so designers must consider them. [0004] Electrostatic discharge can occur on various pins of the chip, some of these pins are I / O ports, some are power rails or GND. [0005] When the chip is working, the I / O port will output different logic signals, so the ESD p...

AI Technical Summary

Problems solved by technology

figure 1 The shown LVTSCR (Low Voltage Triggered Thyristor) is an ESD device with low trigger voltage and strong discharge capability, but such requirements make the LVTSCR device used for ESD protection must consider false triggering by voltage noise or static electricity to enter Signal false flips caused by deep retracement regions (e.g. figure 2 shown), in order to prevent this from happening, the maintenance voltage of the ESD structure must clamp the voltage from the I / O port to GND above the power supply voltage, and the LVTSCR structure has a large current capacity and a small chip footprint The area has become a potential anti-static structure, but due to the low sustain voltage of the LVTSCR structure, its use has been restricted

The same ESD event may also occur between VDD and GND, the difference is that a low sustain voltage between VDD and GND will directly lead to the occurrence of latch-up

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