Forming method of ring gate field effect transistor

Abstract

A formation method of a ring gate field effect tube comprises the following steps of providing a substrate including a first area, a second area and a third area; successively forming a buffer layer located on a substrate surface and several sacrificial layers which are arranged in parallel and are located on a second area buffer layer surface, wherein an arrangement direction of the sacrificial layers is vertical to an arrangement direction of the first area, the second area and the third area; successively forming a channel layer located on the buffer layer surface and a semiconductor doping layer located on a channel layer surface; removing a semiconductor doping layer of an intermediate areal; removing the sacrificial layers and exposing a buffer layer top surface; etching to removing the buffer layer of the second area till that the substrate surface is exposed; and forming a gate structure covering a residual buffer layer sidewall surface on the exposed substrate surface, wherein the gate structure encircles the channel layer of the second area and the gate structure covers a semiconductor doping layer surface of a peripheral area. By using the method, electrical performance of the formed ring gate field effect tube is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a ring gate field effect transistor. Background technique [0002] With the continuous development of semiconductor process technology, the development trend of semiconductor process nodes following Moore's Law continues to decrease. In order to adapt to the reduction of process nodes, the usual measure is to continuously shorten the channel length of MOSFET field effect transistors. The shortening of the channel length has the advantages of increasing the die density of the chip and increasing the switching speed of the MOSFET field effect tube. [0003] However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so that the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing...

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Problems solved by technology

[0006] However, the electrical performance of the gate-all-around field effect transistor formed by the prior art needs to be improved

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