Phase self-compensation infrared detector readout circuit
A technology for infrared detectors and readout circuits, applied in electrical radiation detectors, instruments, measuring devices, etc., can solve the problems of increasing circuit noise, increasing circuit chip area, and complex circuit structure, and achieving increased swing and reduced design. Complexity, the effect of reducing power consumption
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Embodiment approach 1
[0016] figure 1 This is the phase self-compensation CTIA topology diagram. The differential amplifier circuit adopts a one-stage folded cascode structure with differential input. C4 is the phase self-compensation capacitor, and its size is set to be greater than 1pF, so that the circuit has a large The phase margin ensures that the circuit can work normally at low temperature. The integral capacitor is composed of three capacitors, C1, C2, and C3, whose sizes are 1pF, 2pF, and 2pF. Controlled by the selection switch S2, different combinations form different magnifications, and the circuit can adapt to the requirements of different response rates of infrared detectors. When both S1 and S2 are high, the total integral capacitance is 5pF, which is suitable for reading signals with high response rate; when both S1 and S2 are low, the total integral capacitance is 1pF, which is suitable for reading signals with low response rate out. The amplifier adopts a differential amplifier,...
Embodiment approach 2
[0019] figure 2 It is a structural diagram of the phase self-compensation readout circuit unit, including an input integration circuit, a self-compensation capacitor, CDS (correlated double sampling) N-follower, P-follower output. The positive terminal of the differential amplifier is connected to Vref, the negative terminal is the input terminal of the integral current, the integral capacitor Ci is connected between the negative input terminal and the output terminal of the differential amplifier, and the self-compensation capacitor is connected between the output terminal of CTIA and the relevant double sampling CDS , the self-compensating capacitor can make the circuit have a sufficiently large phase margin at low temperature so that the circuit does not oscillate. In order to read out the detector signals of the long line column sequentially, it is necessary to add N follower in the output part of the circuit, followed by P follower. The output signal of CTIA is stored o...
Embodiment approach 3
[0021] The output end of the circuit adopts the structure of N-follower and P-follower of CDS. This output structure can make the output swing of the circuit larger than 2V. The N-follower circuit structure of CDS is as follows image 3 As shown, the N-following part is only turned on when the column selection terminal col is at a low level, and has power consumption. When the column selection terminal col is at a high level, the N-following part is turned off and has almost no power consumption, so the readout circuit is a low-power consumption structure. The power consumption is very small, and the unit power consumption of the long line column circuit is less than 1 milliwatt. The voltage at the col end is provided by the shift register, which controls the long-line column signals to be read out in sequence.
[0022] sha and shb are two sampling pulses, and shaf and shbf are complementary pulses of sha and shb, which control the output signal of CTIA to be transmitted to th...
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