Laterally diffused metal oxide semiconductor field effect transistor with RESURF (reduced surface field) structure

A technology of oxide semiconductors and field effect transistors, applied in semiconductor devices, electrical components, circuits, etc.

Active Publication Date: 2017-06-09
CSMC TECH FAB2 CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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  • Laterally diffused metal oxide semiconductor field effect transistor with RESURF (reduced surface field) structure
  • Laterally diffused metal oxide semiconductor field effect transistor with RESURF (reduced surface field) structure

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[0019] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the associated drawings. A preferred embodiment of the invention is shown in the drawings. However, the present invention can be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be thorough and complete.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the invention. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0021] The se...

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Abstract

The present invention relates to a laterally diffused metal oxide semiconductor field effect transistor with an RESURF (reduced surface field) structure. The laterally diffused metal oxide semiconductor field effect transistor includes a substrate, a gate, a source, a drain, a body region, a field oxide region which is located between the source and the drain, as well as a first well region and a second well region which are located on the substrate; a plurality of gate doped regions are arranged in the second well region below the gate; the polysilicon gate of the gate is of a multi-section structure; the sections of the polysilicon gate are separated from one another; the gate doped regions are arranged below gaps between the sections of the polysilicon gate; and each gate doped region is electrically connected with one of two sections of the polysilicon gate which are located at two sides of the gate doped region, wherein the one section of the polysilicon gate electrically connected with the gate doped region is adjacent to the source. According to the laterally diffused metal oxide semiconductor field effect transistor with the RESURF structure of the invention, the number of trench electrons is increased, and the electrons are accelerated a plurality of times during a process of flowing from the source to the drain, equivalently, and a trench electric field and trench current can be improved, and therefore, trench resistance is reduced, and on-resistance can be reduced.

Description

technical field [0001] The invention relates to a semiconductor process, in particular to a lateral diffusion metal oxide semiconductor field effect transistor with a RESURF structure. Background technique [0002] The basic structure using the principle of RESURF (reduced surface electric field) consists of a low-doped P-type substrate and a low-doped N-type epitaxial layer. Form a P well on the epitaxial layer and inject N+ and P+ to form a horizontal P-well / N-epi junction and a vertical P-sub / N-epi junction. Due to the higher doping concentration at both ends of the lateral junction, the breakdown voltage is lower than that of the vertical junction. The basic principle of RESURF is to use the interaction between the lateral junction and the vertical junction to completely deplete the epitaxial layer before the lateral junction reaches the critical avalanche breakdown electric field. Reduce the effect of the surface electric field. [0003] To improve the on-resistance ...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/063H01L29/7816H01L29/404H01L29/42368H01L29/4238H01L29/7835H01L29/0619H01L29/517H01L29/78618H01L29/7869H01L29/0865H01L29/0882H01L29/4983
Inventor 祁树坤孙贵鹏
Owner CSMC TECH FAB2 CO LTD
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