On-chip power supply network verification method for side channel attack

Abstract

The invention discloses an on-chip power supply network verification method for a side channel attack. The method comprises: logical synthesis and physical design processing is carried out on a register transmission level netlist file of a chip to obtain a transistor level netlist file; according to the obtained transistor level netlist file, a circuit model including a power supply network and a load is established; according to a generated plaintext-ciphertext data pair and a corresponding secret key, a logic process for encryption operation execution on the chip is simulated to obtain a current waveform file of the load; on the basis of the circuit model and the current waveform file of the load, a physical process for encryption operation execution on the chip is simulated to obtain a power consumption curve of the chip; according to the obtained power consumption curve, a side channel attack is carried out on the chip to obtain a guess secret key of the attack; and on the basis of the obtained guess secret key, a side channel attack result is analyzed and an anti-side channel attack capability of the power supply network is verified. The method has advantages of low cost, high accuracy, and reduced design verification period.

Description

technical field [0001] The invention relates to the technical field of integrated circuit design verification, in particular to an on-chip power supply network verification method for bypass attacks. Background technique [0002] In recent years, various attacks of different levels and levels have appeared, making chips face more and more serious security challenges. Among them, the side-channel attack poses a serious threat to the security of the chip. The side-channel attack obtains the internal data of the chip from the bypass signal by statistically analyzing the power consumption and other bypass signals leaked by the chip, thereby deciphering the encrypted information. In addition, bypass signals such as power consumption generated by the chip during operation will be conducted to the outside of the chip through the on-chip power supply network, and then monitored by the outside world. Therefore, the power supply network plays an important role in the chip's ability ...

AI Technical Summary

Problems solved by technology

[0004] However, in the current design, only the figure 1 The shown FPGA hardware platform verifies the anti-side-channel attack capability of the designed chip, which is costly

Moreover, this method can only verify the algorithm and circuit design, and cannot verify the impact of the actual physical parameters of the power supply network on the chip's anti-attack capability, and the accuracy is low.

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