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Metallic oxide semiconductor field effect transistor and manufacturing method thereof

A field-effect transistor, oxide semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as limiting breakdown field strength, gate-to-drain breakdown, and uneven electric field distribution of devices , to achieve the effect of weakening aggregation and increasing reverse breakdown voltage

Active Publication Date: 2017-06-13
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The current metal-oxide-semiconductor field-effect transistor (MOSFET) manufacturing method does not introduce a structure to redistribute the electric field in the gate-drain region, so the electric field distribution inside the device is not uniform, and breakdown is prone to occur at the gate-to-drain end, thereby limiting The breakdown field strength of the existing structure cannot meet the current demand for high-voltage devices

Method used

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  • Metallic oxide semiconductor field effect transistor and manufacturing method thereof
  • Metallic oxide semiconductor field effect transistor and manufacturing method thereof

Examples

Experimental program
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Effect test

example 1

[0039] Example 1, making the substrate as Ga 2 o 3 , Si ions are implanted, and the insulating gate dielectric is Al 2 o 3 Metal Oxide Semiconductor Field Effect Transistors.

[0040] Step 1: Wash the sample as figure 2 (a) shown.

[0041] 1a) First, the epitaxially grown Ga on the substrate 2 o 3 The samples were cleaned organically, washed with flowing deionized water, and put into HF:H 2 Corrosion in the solution of O=1:1 for 60s;

[0042] 1b) The corroded sample was washed with flowing deionized water, and dried with high-purity nitrogen.

[0043] Step 2: Deposit SiO 2 mask, such as figure 2 (b) shown.

[0044] Put the cleaned sample into the PECVD equipment, set the reaction chamber pressure to 2Pa, the RF power to 40W, and simultaneously feed SiH with a flow rate of 40sccm 4 and a flow rate of 10 sccm N 2 O, in n-type Ga 2 o 3 SiO with a thickness of 50 nm was deposited on the film 2 mask.

[0045] Step 3: Make the ion implantation area, such as figu...

example 2

[0067] Example 2, the production substrate is sapphire, implanted with Sn ions, and the insulating gate dielectric is HfO 2 Metal Oxide Semiconductor Field Effect Transistors.

[0068] Step 1: Wash the sample, such as figure 2 (a) shown.

[0069] This step is the same as Step 1 of Example 1.

[0070] Step 2: Deposit SiO 2 mask, such as figure 2 (b) shown.

[0071] This step is the same as Step 2 of Example 1.

[0072] Step 3: Make the ion implantation area, such as figure 2 (c) shown.

[0073] 3.1) To complete SiO 2 The sample deposited by the mask is subjected to photolithography to form an ion implantation area;

[0074] 3.2) Put the photolithographic sample into the ion implantation reaction chamber to perform Sn ion implantation twice, the first implantation energy is 60keV, and the implantation dose is 3.2×10 14 cm -3 ; The second implantation energy is 30keV, and the implantation dose is 9.3×10 13 cm -3 ;

[0075] Step 4: Degelling and annealing activati...

example 3

[0091] Example 3, making the substrate as MgAl 2 o 4 , Ge ions are implanted, and the insulating gate dielectric is Si 3 N 4 Metal Oxide Semiconductor Field Effect Transistors.

[0092] Step A: Wash the sample as figure 2 (a) shown.

[0093] This step is the same as Step 1 of Example 1.

[0094] Step B: Deposit SiO 2 mask, such as figure 2 (b) shown.

[0095] This step is the same as Step 2 of Example 1.

[0096] Step C: Make the ion implantation area: that is, complete the SiO 2 Mask-deposited samples were subjected to photolithography to form ion implantation regions; then the photolithographic samples were placed in the ion implantation reaction chamber for two Ge ion implantations, the first implantation energy was 60keV, and the implantation dose was 3.2×10 14 cm -3 ; The second implantation energy is 30keV, and the implantation dose is 9.3×10 13 cm -3 ;like figure 2 (c) shown.

[0097] Step D: Degelling annealing activation, such as figure 2 (d) shown...

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Abstract

The invention discloses a device structure of a metallic oxide field effect transistor and a manufacturing method thereof. The device structure comprises a substrate (1), a Ga2O3 epitaxial layer (2) and low-doped n-type Ga2O3 thin film (3) from bottom to top, the thin film is provided with a high-doped n-type ion-implanted region (4) and an insulated gate medium (7), the ion-implanted region is provided with a source electrode (5) and a drain electrode (6), the insulated gate medium is provided with a gate electrode (8), the Ga2O3 epitaxial layer is provided with multiple hydrogen-ion-implanted regions (9), the hydrogen-ion-implanted regions are located in the epitaxial layer between the gate electrode and the drain electrode, and meanwhile with the distance increase of the hydrogen-ion-implanted regions and the gate electrode, the widths of the hydrogen-ion-implanted regions are reduced, and intervals among the hydrogen-ion-implanted regions are increased. According to the device structure of the metallic oxide field effect transistor and the manufacturing method thereof, an electric field is adjusted through attraction of hydrogen ions to electrons, a breakdown voltage of a device is improved, and the device structure can be used as a power device and a high voltage switch device.

Description

technical field [0001] The invention belongs to the technical field of semiconductor devices, in particular to a metal oxide semiconductor field effect transistor, which can be used to make power devices and high-voltage switching devices. Background technique [0002] Metal oxide semiconductor field effect transistors are made of metal oxide semiconductor structures, and are divided into different types of metal oxide semiconductor field effect transistors according to their different semiconductor materials. Ga 2 o 3 It is a wide bandgap semiconductor, and its most stable structure is β-type Ga 2 o 3 , belongs to the monoclinic crystal, the band gap is about 4.8eV ~ 4.9eV. According to the relationship between the breakdown electric field strength of other wide-bandgap semiconductor materials and their forbidden band width, it is expected that β-Ga 2 o 3 The breakdown electric field of the material can reach 8MV / cm, more than twice that of SiC and GaN materials. Ga ...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/24H01L21/336H01L29/78
CPCH01L29/0684H01L29/24H01L29/66477H01L29/78
Inventor 冯倩谢文林韩根全方立伟李翔邢翔宇张进成郝跃
Owner XIDIAN UNIV
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