Low-power-consumption, adjustable-frequency and adjustable-duty-ratio clock generation circuit

Abstract

The invention relates to a low-power-consumption, adjustable-frequency and adjustable-duty-ratio clock generation circuit. The low-power-consumption, adjustable-frequency and adjustable-duty-ratio clock generation circuit is characterized in that the circuit includes a DAC (Digital-to-Analogue Conversion) circuit, a charge pump circuit, a comparator circuit, a feedback signal generating circuit and a buffer stage circuit; the DAC circuit receives digital control signals and is electrically connected to the charge pump circuit; the charge pump circuit is electrically connected to the comparator circuit; the comparator circuit is electrically connected to the feedback signal generating circuit and the buffer stage circuit; and the buffer state circuit outputs clock signals CLK. According to the invention, stable, precise adjustable-frequency and adjustable duty-ratio clock signal output can be obtained. Besides, the charge pump circuit is simple in structure and is insusceptible to influence of technique, temperature and voltage change. The clock signal output path is extremely simple and a low signal jitter characteristic is realized.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a clock generating circuit with low power consumption, adjustable frequency and adjustable duty cycle. Background technique [0002] The ever-growing market for portable electronics has spurred academic research on high-performance, low-power, low-voltage electronic systems. SOC-on-chip mixed-signal systems are a high-performance, low-cost solution for a wide range of audio-frequency portable electronics. How to realize the design of low power consumption and low voltage in SOC system has become an important research topic. [0003] In response to this trend, the continuous-time audio sigma-delta ADC reduces the design requirements for analog circuits by using oversampling, noise shaping and digital filtering techniques, and achieves high precision and low power consumption that cannot be achieved by other types of ADCs. However, with the increase ...

AI Technical Summary

Problems solved by technology

This method has a large overall power consumption and complex structure, which is not conducive to the miniaturization of the overall system.

In addition, for applications where the clock frequency and duty cycle of the system need to be adjustable, it is difficult to modify the circuit of the traditional crystal oscillator

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