Unlock instant, AI-driven research and patent intelligence for your innovation.

A group III nitride and silicon heterogeneous integrated substrate and its manufacturing method

A manufacturing method and technology of nitride, which are applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as shortage, CMOS process pollution, etc.

Active Publication Date: 2021-09-28
上海芯晨科技有限公司
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of the shortcomings of the above-mentioned prior art, the object of the present invention is to provide a III-nitride and silicon heterogeneous integrated substrate and its manufacturing method, which is used to solve the lack of CMOS-compatible III-nitride in the prior art. And silicon heterogeneous integrated substrates, Ga, In and other Group III elements will cause pollution to the CMOS process

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A group III nitride and silicon heterogeneous integrated substrate and its manufacturing method
  • A group III nitride and silicon heterogeneous integrated substrate and its manufacturing method
  • A group III nitride and silicon heterogeneous integrated substrate and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0062] The present invention provides a group III nitride and silicon heterogeneous integrated substrate, and the group III nitride and silicon heterogeneous integrated substrate includes:

[0063] Silicon substrate 1;

[0064] a group III nitride stack structure 2 formed on the silicon substrate 1;

[0065] an insulating layer 3 formed on the III-nitride stacked structure 2;

[0066] A top layer of silicon 4 formed on the insulating layer 3 .

[0067] Specifically, since Group III nitrides can grow on Si (111), in this embodiment, the silicon substrate 1 preferably adopts (111) crystalline silicon. While traditional circuits are mostly manufactured on Si (100), in this embodiment, the top layer of silicon 4 is preferably (100) oriented silicon.

[0068] Specifically, the function of the insulating layer 3 is to isolate the III-nitride stacked structure 2 from the top layer silicon 4 . In this embodiment, the insulating layer 3 includes at least one of a silicon dioxide la...

Embodiment 2

[0081] The present invention also provides a method for manufacturing a group III nitride and silicon heterogeneous integrated substrate, please refer to Figure 6 , is shown as a process flow chart of the method, comprising the steps:

[0082] S1: providing a silicon substrate; sequentially forming a group III nitride stack structure and a first insulating layer on the silicon substrate;

[0083] S2: providing a silicon substrate with a second insulating layer formed on its surface, bonding the side of the silicon substrate having the second insulating layer to the side of the silicon substrate having the first insulating layer;

[0084] S3: The silicon substrate is separated into two parts by using an intelligent lift-off technique, and one part is bonded to the surface of the second insulating layer as the top silicon layer.

[0085] See first Figure 7 to Figure 9 Step S1 is performed: providing a silicon substrate 1 ; and sequentially forming a III-nitride stacked struc...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a group III nitride and silicon heterogeneous integrated substrate and a manufacturing method thereof. The group III nitride and silicon heterogeneous integrated substrate includes: a silicon substrate; a III substrate formed on the silicon substrate group-nitride stacked structure; an insulating layer formed on the group-III nitride stacked structure; and top-layer silicon formed on the insulating layer. In the group III nitride and silicon heterogeneous integrated substrate and its manufacturing method of the present invention, the top layer silicon and the group III nitride stacked structure are integrated on the same silicon substrate, wherein the silicon-based stacked structure It can be used to make traditional circuits, combined with the group III nitride stack structure can realize multiple applications, and provides an important technological innovation platform for realizing "Beyond Moore's Law". In the III-nitride and silicon heterogeneous integrated substrate of the present invention, the III-nitride material is deeply buried at the bottom, and only the top silicon and the silicon substrate surface are exposed, which will not pollute the CMOS process, and the CMOS process line can be used Tape out.

Description

technical field [0001] The invention belongs to the field of semiconductors, and relates to a group III nitride and silicon heterogeneous integrated substrate and a manufacturing method thereof. Background technique [0002] The semiconductor industry centered on Moore's Law has driven two waves of information technology, computing (PC) and communication (Internet), in the past half century. However, as the size of silicon CMOS devices approaches the physical limit at the atomic level, the development of Moore's Law has encountered a bottleneck due to huge R&D investment and manufacturing difficulties. The "Beyond Moore" (MtM) industry refers to mature semiconductors and their extended technologies that do not focus on reducing device size as technological innovation, including micro-electro-mechanical systems (Micro-Electro-Mechanical System, MEMS), optoelectronics, radio frequency, power, analog, microfluidics, microenergy, etc. [0003] Compared with bulk silicon materi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/04H01L21/70
CPCH01L21/70H01L27/04H01L21/20H01L31/113H01L33/12
Inventor 陈龙
Owner 上海芯晨科技有限公司