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Photoresist patterning method, preparation method of semiconductor structure, and semiconductor equipment

A patterning and photoresist technology is used in the preparation of semiconductor structures, photoresist patterning methods, and semiconductor equipment fields. The effect of production efficiency

Active Publication Date: 2017-11-21
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In view of the shortcomings of the prior art described above, the object of the present invention is to provide a photoresist patterning method, a method for preparing a semiconductor structure and a semiconductor device, which are used to solve the problem in the prior art that the edge region of the wafer substrate is The non-flat surface leads to the problem that defects are easily caused in the edge region of the wafer substrate after the photolithography process, and the process of avoiding defects in the edge region of the wafer substrate is easy to cause damage to the wafer substrate and Low production efficiency and other issues

Method used

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  • Photoresist patterning method, preparation method of semiconductor structure, and semiconductor equipment
  • Photoresist patterning method, preparation method of semiconductor structure, and semiconductor equipment
  • Photoresist patterning method, preparation method of semiconductor structure, and semiconductor equipment

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Embodiment 1

[0069] see figure 1 , the present invention provides a kind of photoresist patterning method, described photoresist patterning method comprises the following steps:

[0070] 1) providing a wafer substrate, the surface of the wafer substrate includes a plurality of chip regions and a wafer edge region located at the periphery of the chip regions;

[0071] 2) forming a photoresist layer on the upper surface of the wafer substrate, the photoresist layer including a first portion located on the chip region of the wafer substrate and a first portion located on the wafer substrate a second location on the edge region of the wafer;

[0072] 3) forming an annular barrier layer on the upper surface of the second portion of the photoresist layer, the opening of the annular barrier layer revealing the first portion of the photoresist layer;

[0073] 4) performing full-wafer exposure to pattern the first part of the photoresist layer, and under the barrier of the annular barrier layer, ...

Embodiment 2

[0096] see Figure 9 , the present invention also provides a method for preparing a semiconductor structure, the method for preparing a semiconductor structure includes the following steps:

[0097] 1) providing a wafer substrate, the surface of the wafer substrate includes a plurality of chip areas and a wafer edge area located at the periphery of the chip areas;

[0098] 2) forming a hard mask layer on the upper surface of the wafer substrate;

[0099] 3) forming a photoresist layer on the upper surface of the hard mask layer, the photoresist layer including the first part on the chip area of ​​the wafer substrate and the first part located on the wafer substrate a second location on the edge region of the wafer;

[0100] 4) forming an annular barrier layer on the upper surface of the second portion of the photoresist layer, the opening of the annular barrier layer revealing the first portion of the photoresist layer;

[0101] 5) performing full-wafer exposure to pattern ...

Embodiment 3

[0143] see Figure 20 , the present invention also provides a photoresist coating equipment, the photoresist coating equipment is used to implement step 2) to step 3) in the first embodiment, or to implement the step 3) to step 3) in the second embodiment Step 4), the photoresist coating equipment includes: a wafer carrier 20, the wafer carrier 20 is suitable for placing the wafer substrate 10, and drives the wafer substrate 10 to rotate; Spraying system, the photoresist spraying system includes a photoresist supply source (not shown), a first supply pipeline (not shown) and a photoresist nozzle 21; wherein, one end of the first supply pipeline is connected to The photoresist supply source is connected; the photoresist nozzle 21 is located above the center of the wafer carrier 20 (that is, when the wafer substrate 10 is located on the wafer carrier 20, the The photoresist nozzle 21 is directly facing the center of the wafer substrate 10), and communicates with the end of the ...

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Abstract

The invention provides a photoresist patterning method, a preparation method of a semiconductor structure, and semiconductor equipment. The photoresist patterning method comprises the following steps: 1) providing a wafer substrate, wherein the surface of the wafer substrate comprises a plurality of chip areas and marginal areas positioned at the peripheries of the chip areas; 2) forming a photoresist layer on the upper surface of the wafer substrate, wherein the photoresist layer comprises first parts positioned on the chip areas of the wafer substrate and second parts positioned on the marginal areas of the wafer substrate; 3) forming annular barrier layers on the upper surfaces of the second parts of the photoresist layer; 4) performing full-wafer exposure so as to pattern the first parts of the photoresist layer. By the photoresist patterning method, the photoresist layer positioned on the marginal areas of the wafer substrate is avoided from being patterned, and in the follow-up process, defects in the marginal areas of the wafer substrate can be effectively avoided.

Description

technical field [0001] The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a photoresist patterning method, a method for preparing a semiconductor structure and semiconductor equipment. Background technique [0002] With the development of semiconductor technology, the size of semiconductor devices and their parts is getting smaller and smaller. When preparing some device structures with smaller dimensions, the existing photolithography process can no longer meet the requirements. For example, when forming trenches in a wafer substrate, the existing process is generally as follows: firstly, a hard mask layer is formed on the upper surface of the wafer substrate; secondly, a light mask is formed on the upper surface of the hard mask layer. A resist layer, and patterning the photoresist layer by using a photolithography process; then, etching the hard mask layer according to the patterned photoresist layer to pattern the h...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F7/38H01L21/033
CPCG03F7/162G03F7/38H01L21/0337
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC
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