Subthreshold anti-noise full adder circuit

Abstract

The invention provides a subthreshold anti-noise full adder circuit comprising a data input circuit module, wherein the data input circuit module comprises a logic AND gate and a logic exclusive-OR gate and is used for generating a carry signal and a carry propagation signal through an input signal; a data processing circuit module, wherein the data processing circuit module comprises a logic AND gate and a selector and is used for performing logic operation on the carry signal and the carry propagation signal; a data output circuit module, wherein the data output circuit module comprises a logic exclusive-OR gate and is used for outputting a summarization signal and the carry propagation signal generated by the data processing circuit module, wherein the logic AND gates in the data input circuit module and the data output circuit module are Markov AND gates, and the logic exclusive-OR gates are Markov exclusive-OR gates. The subthreshold anti-noise full adder circuit can make the working voltage of the full adder be lower and meanwhile improve the anti-noise performance.

Description

technical field [0001] The invention relates to the technical field of digital integrated circuits, in particular to a subthreshold anti-noise full adder circuit. Background technique [0002] In the current widely used Internet of Things system, a large number of micro-sensor nodes with micro-processing capabilities can realize the functions of real-time monitoring, perception and information collection. At present, due to the limited power supply voltage, the processors of each system node need to work at extremely low voltages, which will seriously affect the performance of the processor circuit under the condition that the noise amplitude of the circuit operation remains unchanged. [0003] In the processor of each system node, the data path is the core of the processor. A typical data path is composed of an arithmetic operator or a logic operator. The adder / full adder is an important part of the data path. The noise immunity of the adder / full adder can effectively impr...

AI Technical Summary

Problems solved by technology

[0005] However, in specific applications, the existing minimum operating voltage of 0.2V is still too high, and only a 4.85 decibel increase from input to output cannot meet the noise immunity performance requirements of the adder / full adder in the processor.

In harsh noisy environments, there is a high probability that the adder / full adder will fail, rendering the entire processor circuit inoperable

Images