Ant-colony-based hardware Trojan optimization test vector generating method
A technology of test vectors and hardware Trojans, applied in the direction of internal/peripheral computer component protection, platform integrity maintenance, etc., can solve problems such as flooding, difficulty, and identification of hardware Trojans, so as to improve performance and efficiency and improve recognition level Effect
Active Publication Date: 2018-01-23
TIANJIN UNIV
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Problems solved by technology
Small-area hardware Trojans are easily overwhelmed by process noise, and it is difficult for us to identify the characteristics of hardware Trojans from the bypass information submerged in noise. Process noise is the main bottleneck to further improve detection accuracy
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[0038] The present invention proposes a hardware trojan optimization test vector generation method based on ant colony, combines the global optimization ability of ant colony, searches for an optimized test vector in the global test vector space, and judges whether the test vector is Optimization, so as to select the test vector that can quickly flip the low-activity node, the test vector can effectively activate the hardware Trojan implanted in the low-activity node, thereby improving the recognition level of the hardware Trojan, for the manifestation and bypass of the hardware Trojan Signal analysis has certain practical significance and reference value.
[0039] Complete technical scheme of the present invention is as follows:
[0040] figure 1 The flow chart of the optimization test vector generation method for the ant colony-based hardware Trojan, the method mainly includes the following steps:
[0041] Step 1: Build a test verification platform, randomly generate test ...
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The invention relates to the technical field of integrated circuit reliability, and provides a hardware Trojan optimization test vector generating method. A generated test vector can be used for effectively activating hardware Trojan embedded in a low-activity node, so that the hardware Trojan recognition level is improved; and certain practical significance and reference values are realized on the hardware Trojan explicitation and by-passing signal analysis. Therefore the method has the technical scheme that according to the ant-colony-based hardware Trojan optimization test vector generatingmethod, by combining with the ant colony global optimization capability, the optimization test vector is found in a global test vector space; whether the test vector is optimized or not is judged according to the turning rate of the low-activity node, so that the test vector capable of fast turning the low-activity node can be picked out; and the test vector can effectively activate the hardwareTrojan embedded into the low-activity node, so that the hardware Trojan recognition level is improved. The hardware Trojan optimization test vector generating method is mainly applied to occasions ofintegrated circuit design and manufacturing.
Description
technical field [0001] The invention relates to the technical field of trustworthiness of integrated circuits, in particular to an ant colony-based hardware Trojan optimized test vector generation method. Background technique [0002] With the rapid development of deep submicron integrated circuit technology and computer-aided design technology, integrated circuits are widely used in the fields of finance, transportation, communication and national defense, and have gradually become an indispensable part of national life. In addition, with the deepening of the wave of economic globalization, semiconductor manufacturers have accelerated the time to market of integrated circuit chips in order to quickly occupy market share and increase revenue and profits. separate from manufacturing. Usually, the design and manufacturing process of an integrated circuit chip requires the joint cooperation of multiple units, some of which involve the assistance of foreign capital or joint ven...
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IPC IPC(8): G06F21/71G06F21/55
Inventor 赵毅强刘燕江解啸天刘阿强
Owner TIANJIN UNIV