A method for optimizing shallow trench morphology in soi and bulk regions of fdsoi devices
An optimization method and device technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to achieve the effect of improving process and device performance, eliminating film layer differences, and reducing depth loads
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[0020] The specific embodiments of the present invention are given below in conjunction with the accompanying drawings, but the present invention is not limited to the following embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in very simplified form and use imprecise ratios, which are only used for the purpose of conveniently and clearly assisting in describing the embodiments of the present invention.
[0021] Please refer to figure 1 , figure 1 Shown is a flow chart of the method for optimizing the shallow groove morphology of the SOI and bulk regions of the FDSOI device according to a preferred embodiment of the present invention. The present invention proposes a method for optimizing the shallow groove morphology of the SOI and bulk regions of an FDSOI device, comprising the following steps:
[0022] Step 1 S100: providing an FDSOI device substrate;
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