Low-power consumption sensitive amplifier type D-flip flop

Abstract

The invention provides a low-power consumption sensitive amplifier type D-flip flop, and belongs to the technical field of integrated circuits. The low-power consumption sensitive amplifier type D-flip flop comprises an input inverting stage, a sensitive amplifier stage and a latch stage; the input inverting stage is used for generating an inverted input data signal and an inverted clock signal; an evaluation pulldown part and a data storage part of the sensitive amplifier stage are independent, evaluation pulldown is achieved through two NMOS transistors which are connected in series, internal charging and discharging nodes are decreased, and by means of transmission gates controlled by the lock signal and the inverted clock signal, the input data signal achieves data transmission and avoids the influence of input data changes generated when the clock signal is in a high level; and the latch stage introduces an independent pulldown path formed by a pair of NMOS transistors which are connected in series and controlled by the clock signal and the input data signal and the clock signal and the inverted input clock signal respectively on the basis of a traditional NAND gate type SR latch, and output pulldown only has one-stage delay. The low-power consumption sensitive amplifier type D-flip flop has the advantages of low power consumption and short delay simultaneously, achieves great improvement on the power delay product (PDP) and is particularly suitable for an application system with the low switch activity.

Description

technical field [0001] The invention relates to a D flip-flop, in particular to a low-power consumption sensitive amplifier type D flip-flop. Background technique [0002] Flip-flops are an important part of synchronous CMOS digital integrated circuits. With the development of pipeline technology, flip-flops play an increasingly important role in digital circuits. With the continuous improvement of the manufacturing process of CMOS integrated circuits, the scale of integrated circuits is increasing day by day, and the problems of power consumption and heat dissipation are getting more and more attention from academia and industry. Studies have shown that the power consumption of flip-flops in integrated circuits accounts for a large part of the total power consumption of the system, even up to 60%. Reducing the power consumption of flip-flops can greatly reduce system power consumption, so the research on low-power flip-flops is particularly important. important. [0003] ...

AI Technical Summary

Problems solved by technology

[0004] Aiming at the deficiencies such as the rising and falling delay asymmetry, slow evaluation speed and high power consumption of the above-mentioned traditional sensitive amplifier type D flip-flop, the present invention proposes a low power consumption sensitive amplifier type D flip-flop, which has an independent Value path, low power consumption, and high speed, especially in low switching activity applications, has a significant low power consumption advantage

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