Supercharge Your Innovation With Domain-Expert AI Agents!

Low Latency Polar Code Decoder

A polar code and low-latency technology, applied in the field of fast computing, can solve problems such as consumption, and achieve the effects of improving throughput, shortening computing unit paths, and improving hardware efficiency

Active Publication Date: 2022-02-11
CHINA JILIANG UNIV
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The existing method is to separate the sign bit and absolute value of the information data into the form, combine and perform corresponding calculations in the intermediate calculation process, and finally separate the output method, which needs to consume a total of four unit clocks of delay consumption. Each unit clock is the delay consumption of an adder

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Low Latency Polar Code Decoder
  • Low Latency Polar Code Decoder
  • Low Latency Polar Code Decoder

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0009] The present invention will be further described below in conjunction with accompanying drawing.

[0010] In the existing literature, formula (1) in polar code decoding algorithm can be simplified to formula (2)

[0011] d=a+ln[(1+e b+c ) / (e b +e c )] (1)

[0012] d=a+Sign(b)*Sign(c)*g(b,c) (2)

[0013] Among them, g(b,c)=s*Min(|b|,|c|). a, b and c are the input data of the calculation unit of mode 1,

[0014] And it is expressed in the form of sign bit (Sign) and absolute value (Mag) separation; s=0.9375 is the multiplication correction factor introduced, which is used to reduce the approximation error to the original nonlinear function expression (1), which can be passed on the hardware A shift-subtractor implementation. Min(|b|,|c|) means finding the smaller value between two absolute values ​​|b| and |c|.

[0015] The calculation unit structure designed by the present invention for formula (2) is as follows figure 1 As shown, the steps of the entire calculat...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a method for reducing the calculation unit path of a polar code SMS decoder. The invention includes the following steps: firstly combining the sign and absolute value of the input data in the original calculation path for real number addition, and then separating them into The process of sign and absolute value output, the present invention utilizes the method of parallel computing, calculates the result of all three kinds of possible real number additions with absolute value, compares the size of two input absolute values ​​and expresses with sign at the same time, in the next adder cycle directly The correct real number addition result value is screened out through sign judgment, which saves an adder time delay required for combination and separation of sign and absolute value compared with the methods in the existing literature. Therefore, the original calculation path is reduced from four adders to three adders, and the polar code SMS decoder can improve the throughput rate by 33% and the hardware efficiency by 27% under the condition of short code length.

Description

technical field [0001] The invention belongs to the field of electronic technology. In particular, it relates to a fast computing method for binary real number addition and modulo taking on hardware. Background technique [0002] In the field of communication, polar codes are so far the only channel coding schemes that can theoretically reach the Shannon limit, and have been successfully selected into the 5G communication standard. In order to achieve low-complexity parallel decoding, some scholars have proposed a polar code SMS decoder based on BP algorithm, which reduces the delay of the decoder while maintaining good performance. [0003] For the polar code SMS decoder with short code length, the delay of the whole decoding process depends on the path length of the calculation unit. The existing method is to separate the sign bit and absolute value of the information data into the form, combine and perform corresponding calculations in the intermediate calculation proce...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/13H03M13/15
CPCH03M13/13H03M13/155
Inventor 王秀敏古锐肖丙刚
Owner CHINA JILIANG UNIV
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com