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Ferroelectric multi-logic state memory cell and read/write/erase operation method thereof

A storage unit and logic storage technology, which is applied in the field of information technology storage, can solve the problems of poor controllability of ferroelectric domain wall conductivity, difficulty in controlling the thickness, position, configuration and thickness of ferroelectric domain walls, etc.

Active Publication Date: 2018-09-18
XIANGTAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, at present, ferroelectric memory still faces severe problems in multi-logic ferroelectric storage, especially the controllability of ferroelectric domain walls needs to be improved.
Taking the invention described in the US invention patent (US12839411) as an example, it is aimed at 5nm-25nm thick BiFeO 3 , BaTiO 3 The control of the ferroelectric domain wall in the thin film is designed, but in the actual operation process, because the existence of the ferroelectric domain wall depends on the internal defects of the film and the writing method of the domain wall, the design structure for the formation of the ferroelectric domain wall The position is not clear. Although it is theoretically possible to realize multi-logic state storage, the controllability of the conductivity of the ferroelectric domain wall is poor. In particular, it realizes the formation of the ferroelectric domain wall by controlling the magnitude of the voltage, resulting in The location, configuration and thickness of domain walls in ferroelectric thin films are difficult to control
It is difficult to achieve the thickness of the ferroelectric domain wall under the electric field of non-parallel electrodes through the magnitude of the voltage value. In this design, the thickness of the ferroelectric domain wall will be significantly larger than that of the ordinary domain wall, which will directly restrict the conductivity of the ferroelectric domain wall and the ferroelectric domain wall. The number of domain walls in the film limits the multi-logic state storage performance of the ferroelectric domain wall storage; at the same time, the realization of the multi-logic state storage performance of the ferroelectric domain wall storage strongly depends on the dielectric properties of the dielectric materials , which limits the development of this type of ferroelectric domain wall memory, so far no principle device of this type of ferroelectric domain wall memory has been developed

Method used

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Embodiment 2

[0046] The structure of the memory cell in embodiment 2 is the same as that in embodiment 1, except that the material of the lower dielectric layer (1221 and 1222) is barium titanate, and the thickness is 10 nm. The upper dielectric layer (1211 and 1212) is strontium titanate with a thickness of 18nm. The material of the ferroelectric thin film is lead titanate, and 10 different logic states can be obtained in the memory cell.

Embodiment 3

[0048] The structure of the memory cell in embodiment 3 is the same as that in embodiment 1, except that the material of the lower dielectric layer (1221 and 1222) is strontium titanate, and the thickness is 8nm. The upper dielectric layer (1211 and 1212) is barium titanate with a thickness of 8nm. The material of the ferroelectric film is barium titanate, and 12 different logic states can be obtained in the memory cell.

Embodiment 4

[0050] The structure of the memory cell in embodiment 3 is the same as that in embodiment 1, except that the material of the lower dielectric layer (1221 and 1222) is magnesium oxide, and the thickness is 8nm. The upper dielectric layer (1211 and 1212) is titanium oxide with a thickness of 8nm. The material of the ferroelectric film is barium titanate, and 16 different logic states can be obtained in the memory cell.

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Abstract

The invention aims to provide a ferroelectric multi-logic state memory cell and a read / write / erase operation method thereof; the method comprises the following steps: using an oxide electrode to clampa ferroelectric epitaxial ferroelectric film; enabling a metal electrode to penetrate the oxide electrode and make contact with the epitaxial ferroelectric film; controlling a write-in voltage pulseso as to control ferroelectric film internal electric domain nucleation and iron electric domain wall motions, and enabling the formed iron electric domain walls to move from a contact position between the metal electrode and the ferroelectric film to the periphery; changing a voltage pulse direction so as to invert the electric domain, forming new domain walls and enabling same to move outwards;controlling the voltage pulse so as to control the domain wall motion distances, and the domain walls cannot interfere each other. The structure design can control the electric domain nucleation position in the ferroelectric film, and can control the pulse voltage application time so as to control the ferroelectric domain wall motion positions, thus effectively improving the ferroelectric domain wall position control and storage data stability in the memory cell, and promoting the multi-logic state ferroelectric domain wall memory device applications.

Description

technical field [0001] The invention relates to the field of information technology storage, and in particular provides a ferroelectric multi-logic state storage unit and a read / write / erase operation method thereof. Background technique [0002] Ferroelectric memory has the advantages of wide operating temperature range, fast read and write speed, anti-fatigue, low power consumption, and radiation resistance, and has attracted great attention in the military and civilian fields. Ferroelectric memory stores data based on the orientation of the electric domains of the ferroelectric film. Under the action of an external electric field or force field, the conversion of binary "1" and "0" can be realized through the flipping of the electric domains. However, under the trend of device miniaturization, when the device memory cell size is less than 130nm, the current readout circuit is basically unable to recognize the logic information stored in the memory cell, which seriously hin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/77H01L27/11502G11C16/16H10B53/00
CPCG11C16/16H01L21/77H10B53/00
Inventor 侯鹏飞刘云霞王金斌钟向丽郭红霞杨琼
Owner XIANGTAN UNIV
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