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Non-volatile ferroelectric random access memory and preparation process thereof

A random access memory, non-volatile technology, applied in the direction of electric solid-state devices, circuits, electrical components, etc., can solve the problems of uneven thermal budget of ferroelectric capacitors, reduce the uniformity and stability of film performance, and complicated processes, etc., to achieve The effect of high storage density, low manufacturing cost, and simple process

Active Publication Date: 2018-09-18
XIANGTAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the process is relatively complicated, and the thermal expansion coefficients of the metal vias and the dielectric layer are different during the annealing of the ferroelectric film, which will lead to uneven thermal budget of the ferroelectric capacitor and reduce the uniformity and stability of the film performance.

Method used

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  • Non-volatile ferroelectric random access memory and preparation process thereof
  • Non-volatile ferroelectric random access memory and preparation process thereof
  • Non-volatile ferroelectric random access memory and preparation process thereof

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Embodiment 1

[0045] The invention proposes a nonvolatile ferroelectric random access memory and a preparation process.

[0046] refer to figure 2 , complete the source region (2), drain region (3), gate dielectric layer (4), through holes (5), necessary metal electrodes (6) and metal wiring (7) of the transistor.

[0047]Among them, the p-type silicon substrate is the substrate, the source / drain region is n-type silicon, and the gate dielectric layer is HfO 2 The insulating film has a thickness of 5 nm. The design of the transistor is compatible with the current 0.13μm process node, and the three-layer metal wiring is completed, and the metal used is Cu.

[0048] The current 0.13μm node process can also adopt the through-hole design of the double-layer damascene structure.

[0049] The integration process of the hafnium oxide-based ferroelectric capacitor provided by the present invention mainly refers to Figure 3-5 . It includes a bottom electrode (8), a hafnium oxide-based ferroel...

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Abstract

The invention relates to a non-volatile ferroelectric random access memory and a preparation process thereof. Since the surface formed by through hole filling is not flat, the structure of the layer and the spatial design of a substrate layer are combined and a ferroelectric capacitor is integrated on metal far away from the through hole. On the one hand, the performance damage of the ferroelectric capacitor because of the unevenness near the surface of the through hole is avoided; and on the other hand, the high-density memory unit design is realized. The ferroelectric random access memory prepared by the process has advantages of high storage density, high compatibility with a CMOS process line and simple process flow; and no planarization process is needed before ferroelectric capacitorintegration.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit technology, relates to the field of integration technology of new memory, and specifically relates to a preparation technology of nonvolatile ferroelectric random access memory (FRAM) based on ferroelectric capacitor integration of CMOS back-end technology. Background technique [0002] FRAM is known as one of the most promising memories in the next-generation memory technology. It integrates ferroelectric capacitors (including bottom electrodes, ferroelectric thin film materials and top electrodes) into complementary oxide metal semiconductors (CMOS), and defines the positive and negative polarized charge values ​​​​on the hysteresis loop of ferroelectric capacitors as data" 0" and "1" to realize the storage function, refer to figure 1 . FRAM has the characteristics of RAM (random access memory) and ROM (read-only memory) at the same time. It has the advantages of non-volatility, low...

Claims

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Application Information

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IPC IPC(8): H01L27/11502H01L27/115
CPCH10B53/00H10B69/00
Inventor 廖佳佳彭强祥曾斌建廖敏周益春
Owner XIANGTAN UNIV
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