Data transmission system and data transmission method

Abstract

The invention provides a data transmission system and data transmission method. The data transmission system comprises a time sequence controller, wherein the time sequence controller comprises a datainterface, a judgment module and a protocol module; the judgment module is connected with the data interface; the protocol module is connected with the judgment module; the data interface comprises aplurality of pins which are arranged in sequence; a plurality of data transmission protocols are arranged in the protocol module; the judgment module is used for collecting signals from a plurality of pins of the data interface, and controlling the protocol module to select the data transmission protocol corresponding to the signal type according to the collected signal type of each pin for carrying out data transmission; and through pin reuse, the same data interface can carry out data transmission on the basis of different data transmission protocols so as to reduce the pin amount of the time sequence controller and lower wiring areas occupied by the time sequence controller and production ncost.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a data transmission system and a data transmission method. Background technique [0002] With the development of display technology, liquid crystal displays (Liquid Crystal Display, LCD) and other flat display devices are widely used in mobile phones, televisions, personal digital Various consumer electronic products such as assistants, digital cameras, notebook computers, and desktop computers have become the mainstream of display devices. [0003] A flat panel display device generally includes a display panel (Panel) and an external drive circuit, and the external drive circuit generally includes: a clock control chip (TCON) on a printed circuit board (Printed Circuit Board, PCB), a power management chip (Power manage IC) and a programmable gamma correction chip (P-gamma IC), etc., wherein the clock control chip is mainly used to convert low-voltage differential signaling (Lo...

AI Technical Summary

Problems solved by technology

like figure 1 As shown, the existing data transmission system includes: a flash memory chip 100, a timing controller 200, a programming interface 300, a main serial peripheral interface (Serial Peripheral Interface, SPI) bus connecting the flash memory chip 100 and the timing controller 200 400 and the branch SPI bus 500 drawn from the main SPI bus 400 and connected to the programming interface 300, during work, the timing controller 200 reads data from the flash memory chip 100 through the main SPI bus 400 , burn data into the flash memory chip 100 via the branch SPI bus 500 through the burning interface 300, and as figure 1 As shown, the existing timing controller 200 is usually integrated with three kinds of data transmission interfaces, which are respectively SPI data transmission interface 201, Universal Asynchronous Receiver / Transmitter (UART) data transmission interface 202, integrated circuit bus (Inter -Integrated Circuit, IIC) data transmission interface 203, resulting in a larger number of pins in the existing timing controller 200, and larger wiring area and production cost.

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