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An Asymmetric Threshold Service Polling System Based on FPGA

An asymmetric and threshold technology, applied in transmission systems, electrical components, etc., can solve problems such as limiting the scope of use, and achieve the effects of ensuring fairness, short development cycle, and flexible control

Active Publication Date: 2022-04-12
杨志军
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional polling technology is becoming more and more mature, but its limitation is that the information arrival rate, service time and switching time between adjacent terminals of this technology are all the same, which greatly limits the scope of use of this technology

Method used

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  • An Asymmetric Threshold Service Polling System Based on FPGA
  • An Asymmetric Threshold Service Polling System Based on FPGA
  • An Asymmetric Threshold Service Polling System Based on FPGA

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Embodiment Construction

[0027] The present invention adopts the method of combining schematic diagram and text input to design the system from top to bottom, uses FPGA built-in asynchronous fifo soft core to cache and send the information grouping with Poisson distribution characteristics received by each site, and uses Based on the frequency division technology for speed matching, independent clock control for reading and writing of fifo memory, to meet the processing speed requirements of the server when processing different services.

[0028] Below in conjunction with accompanying drawing and technical characterictic of the present invention, the specific implementation of this service polling system is divided into four modules and is described:

[0029] 1 source module

[0030] The source module generates Poisson distribution data satisfying the Markov characteristic. The Poisson arrival rate λ represents the average number of information packets generated per unit time slot, and the value is an...

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Abstract

The invention relates to an FPGA implementation of an asymmetric threshold service polling system, which belongs to the field of wireless sensor network communication. The top-down design of the system is carried out by combining the schematic diagram and text input, and the FPGA built-in asynchronous fifo soft core is used to cache and send the information packets with Poisson distribution characteristics received by each site, and with the help of the distribution Frequency technology for speed matching, independent clock control for fifo memory reading and writing, to meet the processing speed requirements of the server when processing different services; the design uses threshold rules to provide services to each site, effectively overcoming the site "under complete rules" Busy” and “hunger” problems, solve the problem of frequent phase switching under limited rules, use Verilog HDL language to set up the finite state machine, control the different switching times between stations, and ensure the fairness of services between stations. The invention has flexible control and short development period, and can be widely used in various business processing occasions.

Description

technical field [0001] The invention relates to an FPGA realization of an asymmetric threshold service polling system, which belongs to the field of wireless sensor network communication. Background technique [0002] Today's society is constantly transforming towards digitalization. Cloud computing, big data, deep learning and other technologies to realize the intelligent interconnection of all things have become popular. FPGA technology based on heterogeneity has been widely used in massive data processing and network acceleration. [0003] FPGA is a semi-customized circuit that uses hardware languages ​​such as Verilog to describe combinational logic, sequential logic, state machine logic, and complex digital systems that can be synthesized into actual circuits. It has the advantages of both ASIC and processor systems, and has strong parallel computing capabilities and fast response. , short development cycle, flexible control, stable performance and low power consumption...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L67/60H04L67/1017H04L47/62H04L49/90
CPCH04L47/6285H04L49/9031H04L49/9084H04L67/1017H04L67/60
Inventor 杨志军路秀迎丁洪伟
Owner 杨志军