Unlock instant, AI-driven research and patent intelligence for your innovation.

Repair method of single event upset error of SRAM -type FPGA (Field Programmable Gate Array) in-chip tracking loop

A single-event inversion and tracking loop technology, applied in the field of single-event inversion error repair of SRAM-type FPGA on-chip tracking loop, can solve problems such as failure to achieve closed-loop tracking circuit single-event inversion error repair, interrupting the normal operation of the circuit, etc. The effect of ensuring consistency and saving circuit resources

Active Publication Date: 2018-11-06
BEIJING INSTITUTE OF TECHNOLOGYGY
View PDF14 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The common shortcomings of the above methods are: (1) due to the particularity of the memory function of the on-chip closed-loop tracking circuit, only refreshing the SRAM type FPGA configuration memory cannot realize the repair of the single event flip error of the closed-loop tracking circuit; (2) the SRAM Methods such as reloading a small FPGA can clear the single event flip error of its on-chip closed-loop tracking circuit, but it will interrupt the normal operation of the circuit

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Repair method of single event upset error of SRAM -type FPGA (Field Programmable Gate Array) in-chip tracking loop
  • Repair method of single event upset error of SRAM -type FPGA (Field Programmable Gate Array) in-chip tracking loop
  • Repair method of single event upset error of SRAM -type FPGA (Field Programmable Gate Array) in-chip tracking loop

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0033] The present invention will be described in detail below with reference to the accompanying drawings and examples.

[0034] A kind of on-chip tracking loop error repairing method based on SRAM type FPGA of the present invention, such as figure 1 As shown, the SRAM FPGA is used to realize the signal processing function of the radio system tracking loop, and the antifuse FPGA that is not sensitive to single event flipping is used to vote on the processing results of the internal tracking loop of the SRAM FPGA. When an abnormality is found, the The internal data of the tracking loop is corrected; in addition, the anti-fuse FPGA also dynamically refreshes the configuration data of the SRAM FPGA. Among them, the tracking loop in the SRAM FPGA adopts a triple-mode redundant design, including tracking loops 1, 2 and 3; the composition circuit of the antifuse FPGA includes a full load control circuit, a dynamic refresh control circuit and a tracking loop Error detection and cor...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a repair method of a single event upset error of a SRAM -type FPGA (Field Programmable Gate Array) in-chip tracking loop. Compared with a method for directly performing triple-modular voting on output results of three tracking loops, the problem that after a single tracking loop makes an error, immediate correction cannot be performed, resulting in error accumulation to cause error of the multiple tracking loops, so that the correct results are not outputted is solved, and the errors of the three tracking loops are not accumulated; meanwhile, channel data with errors are synchronously detected and corrected, uninterruptible recovery design of the FPGA tracking loops is realized, and the consistency of the operation states of the three tracking loops is ensured; thesingle event upset error of the tracking loops can be reliably and timely discovered by the triple module redundancy design of the tracking loops and an anti-fuse FPGA triple modular error detection and correction circuit insensitive to the single event upset. The triple modular redundancy and judgement are realized by FPGA software, and compared with a FPGA hard triple module implementation method, a circuit resource can be saved.

Description

technical field [0001] The invention belongs to the technical field of reliability design, and in particular relates to a method for repairing a single-event flipping error of a tracking loop in a SRAM-type FPGA chip. Background technique [0002] In space-based detection, satellite navigation, aerospace measurement and control and other application fields, in order to obtain the required target measurement information, the signal processing system needs to capture and track the received radio signal. SRAM type Field Programmable Gate Array (FPGA) is widely used in the on-chip implementation of complex algorithms for radio signal acquisition and tracking due to its rich resources such as logic gates, multipliers, and memory on-chip. With the improvement of the integration of SRAM FPGA, the single event flipping effect is prone to occur in the space irradiation environment, resulting in circuit function errors and failures, which seriously affect the reliability and safety of...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G11C11/412G06F11/18
CPCG06F11/186G11C11/4125
Inventor 向锦志崔嵬杨焕全周俊伟吴嗣亮
Owner BEIJING INSTITUTE OF TECHNOLOGYGY
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More