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Manufacturing method of high-flatness VIA-IN-PAD circuit board

A kind of VIA-IN-PAD, the technology of making method

Inactive Publication Date: 2018-11-23
SHENZHEN SUNTAK MULTILAYER PCB
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention aims at the problem of the above-mentioned defects in the existing resin plug hole circuit board, and provides a method for manufacturing a VIA-IN-PAD circuit board with high flatness. The flatness between the board surfaces solves the problem of resin plug hole depression caused by the leveling of the abrasive belt

Method used

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Embodiment 1

[0024] The manufacturing method of a high-flatness VIA-IN-PAD circuit board shown in this embodiment, after completion, the flatness at the resin plug hole meets the requirement of ≤5um, and includes the following processing steps in sequence:

[0025] (1) Cutting: Cut out the core board according to the panel size of 520mm×620mm, the thickness of the core board is 1.2mm, and the thickness of the outer copper surface of the core board is 0.5OZ.

[0026] (2), inner layer circuit production (negative film process): inner layer graphics transfer, use vertical coating machine to coat photosensitive film, the film thickness of photosensitive film is controlled to 8μm, adopt automatic exposure machine, with 5-6 grid exposure ruler ( 21 grid exposure ruler) to complete the exposure of the inner layer circuit; inner layer etching, etch the exposed and developed core board to etch the inner layer circuit, the inner layer line width is measured as 3mil; the inner layer AOI, and then chec...

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PUM

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Abstract

The invention discloses a manufacturing method of a high-flatness VIA-IN-PAD circuit board. The manufacturing method comprises the following steps that through holes are drilled in a production boardwhich is subjected to early-stage pressing; then the through holes are metallized through a copper deposition and full-board electroplating process; the metallized through holes are filled with resin;pre-baking is carried out on the production board, and the filled resin is made to be in a semi-solidified state; the resin which is protruded out of the board surface after plugging is removed by adopting a non-woven grinding plate; then the production board is baked, so that the filled resin is completely solidified; and then secondary copper deposition and full-board electroplating is carriedout on the production board; and an outer-layer circuit, a solder-resistant layer and silk-screen characters are manufactured on the production board in sequence, and then surface treatment is performed to manufacture the circuit board. According to the method, the manufacturing process flow is optimized, the flatness of the surface of the resin and the board surface of the production board can beimproved, and the problem that the resin-plugged hole is sunken due to the leveling of an abrasive belt is solved.

Description

technical field [0001] The invention relates to the technical field of manufacturing printed circuit boards, in particular to a method for manufacturing a high-flatness VIA-IN-PAD circuit board. Background technique [0002] VIA-IN-PAD, that is, to make pads on the surface of the corresponding resin plug holes. The current manufacturing process of VIA-IN-PAD resin plug hole circuit boards is: pre-process → lamination → drilling → outer copper sinking →full board electroplating→resin plug hole→curing→abrasive belt grinding plate 1→hole mask pattern→copper reduction (etching)→abrasive belt grinding plate 2→secondary copper deposition→secondary full board electroplating→outer layer graphics→graphic electroplating → Outer layer etching → Outer layer AOI → Silk screen solder mask, characters → Surface treatment → Forming → Electrical testing → FQC / FQA. [0003] In the above production process, the resin is completely cured after the resin plug hole, and then the resin plug hole ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H05K3/00
CPCH05K3/0094H05K2201/0959
Inventor 周文涛宋建远翟青霞徐正
Owner SHENZHEN SUNTAK MULTILAYER PCB
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