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An IGBT device with low noise and low switching loss

A switching loss and low noise technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of large switching loss and reduced withstand voltage of devices, so as to reduce the saturation conduction voltage drop, reduce Cgc, and reduce off time and the effect of turn-off loss

Active Publication Date: 2018-12-21
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Application Information

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Problems solved by technology

[0005] In view of the above, the present invention provides a low-noise and low-switching-loss IGBT device for the existing discrete floating P-region slot-gate IGBT devices that have problems such as P-region potential changes resulting in reduced device withstand voltage and large switching losses.

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  • An IGBT device with low noise and low switching loss
  • An IGBT device with low noise and low switching loss
  • An IGBT device with low noise and low switching loss

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Embodiment

[0031] An IGBT device with low noise and low switching loss, such as figure 2As shown, its cellular structure includes metal collector 7, P+ collector region 6, N-type buffer layer 5, N-drift region 4 and metal emitter 11 stacked sequentially from bottom to top; the N-drift region 4 The middle area of ​​the top layer is provided with a discrete P+ floating pbody area 8, the two sides of the discrete P+ floating pbody area 8 are respectively provided with a P+ base area 2, and the top layer of the P+ base area 2 is provided with an N+ emission area 1; The P+ base region 2 and the N+ emitter region 1 are in contact with the discrete P+ floating pbody region 8 through the metal emitter 11; a gate is provided between the P+ base region 2 and the N+ emitter region 1 and the discrete P+ floating pbody region 8 structure, the gate structure includes a gate electrode 9 and a gate dielectric layer 3, the gate dielectric layer 3 extends into the N-drift region 4 along the vertical dire...

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Abstract

The invention belongs to the technical field of power semiconductor devices, in particular to an IGBT device with low noise and low switching loss characteristics. By introducing a low noise P + typeJFET source region 13, an N + type JFET gate region 14 and a P + type JFET gate region 15 into a discrete floating pbody region 8 of a conventional IGBT device, the present invention stores hole-enhanced conductance modulation when the device is turned on, drains holes quickly when the device is turned off, and reduces the turn-off time; At that same time, a half surround structure is formed in the gate region 14 of the JFET by the dielectric layer 10, the Miller capacitance Cgc of the device is reduced, the influence of the parasitic NPN on the effective gate voltage in the JFET structure issuppressed, and the switching time and the switching loss are reduced under the condition of ensuring low noise.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices, in particular to an IGBT device with low noise and low switching loss characteristics. Background technique [0002] With the rapid development of rail transit, smart grid, wind power and other fields, insulated gate bipolar transistors (Insulated Gate Bipolar Transistor, IGBT) rely on the advantages of simple gate control, high input impedance, high current density, and low saturation voltage. It has become one of the mainstream power switching devices in the medium and high power range, and will continue to develop in the direction of high voltage and high current, low power loss, high operating temperature and high reliability. [0003] High-voltage IGBTs usually adopt a planar gate structure, which is used in high-reliability environments such as high-speed rail and power transmission. However, due to the parasitic JFET resistance of the planar-gate IGBT, compared with the...

Claims

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Application Information

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IPC IPC(8): H01L29/739H01L29/06
CPCH01L29/0696H01L29/7397
Inventor 李泽宏彭鑫杨洋赵一尚贾鹏飞
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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