LDMOS device structure and manufacturing method thereof

Abstract

The invention relates to an LDMOS (Lateral Double Diffused MOSFET) device structure. The LDMOS device structure includes a first conductivity type of substrate, a first conductivity type of epitaxiallayer formed on the substrate, a second conductivity type of drift region formed in the epitaxial layer, a first conductivity type of well region extending into the substrate from the surface of the epitaxial layer, a first conductivity type of channel region formed in the drift region and located between the drift region and the well region, a second conductivity type of source region located inthe well region and the channel region, a second conductivity type of drain region located in the drift region, and a gate electrode located above the channel region while a gate insulating layer is formed in the gate, wherein a channel is formed in the place close to the surface of the epitaxial layer, and the channel partially covers the drift region and the channel region, and the channel is filled with a channel filling region composed of oxides. The present invention also discloses a manufacturing method of the LDMOS device structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors. More specifically, it relates to an LDMOS device structure and a manufacturing method thereof. Background technique [0002] The lateral double diffused metal oxide semiconductor field effect transistor (Lateral Double Diffused MOSFET) is a radio frequency power amplifier device with great market demand and broad development prospects. In the field of radio frequency wireless communication, base stations and long-distance transmitters almost all use silicon-based LDMOS high-power transistors; in addition, LDMOS is also widely used in radio frequency amplifiers, such as HF, VHF and UHF communication fields, pulse radar, industrial, scientific and medical applications , Avionics and WiMAXTM communication systems and other fields. [0003] As the size of LDMOS devices decreases, the gate oxide thickness, junction depth, and channel length of the device decrease, and the device will inevitab...

AI Technical Summary

Problems solved by technology

The hot carriers hit the lattice atoms, and impact ionization occurs, generating secondary electron-hole pairs. Among them, some of the holes become the substrate current, and some of the carriers can pass through Si / SiO 2 potential barrier, forming the gate current, in Si / SiO 2 The generation of interface states and traps in the gate oxide will lead to the degradation of device performance, such as threshold voltage, transconductance and linear region / saturation region current, which will affect the service life of the device and even lead to device failure

Images