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A superjunction device and a method for manufacturing the same

A technology of super-junction devices and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., and can solve problems that affect device reliability, capacity weakening, and device resistance to avalanche breakdown.

Active Publication Date: 2019-01-04
SHENZHEN SANRISE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Usually, the contact hole at the top of the p-type ring will be formed by extending the contact hole at the top of the source region in the charge flow region to the transition region, so this limits the size of the contact hole at the top of the p-type ring. Such a limitation makes The ability of the device to collect electron-hole pairs through the contact hole in the transition region is weakened, which affects the anti-avalanche breakdown capability of the device. At the same time, it also limits the thickness of the interlayer film in the contact hole area of ​​the P-type ring in the transition region. The contact hole in the area should not be too thick to affect the filling ability of subsequent metal deposition in the contact hole, otherwise pinholes may appear in the metal filling due to the high aspect ratio, thus affecting the reliability of the device

Method used

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  • A superjunction device and a method for manufacturing the same
  • A superjunction device and a method for manufacturing the same
  • A superjunction device and a method for manufacturing the same

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Embodiment Construction

[0069] The super junction device of the first embodiment of the present invention:

[0070] Such as Image 6 Shown is a top view of the formation area of ​​the source 7a and gate 7b formed by the front metal layer of the superjunction device in the first embodiment of the present invention; in order to more clearly understand the structure of the device in the first embodiment of the present invention, here also combined with Figure 1 to Figure 5 as well as Figure 7 to Figure 10 For explanation, the details are as follows:

[0071] The super-junction device of the first embodiment of the present invention is described by taking a super-junction MOSFET as an example. The middle region of the super-junction device of the first embodiment of the present invention is the charge flow region, the terminal region surrounds the outer periphery of the charge flow region, and the transition region is located at Between the charge flow region and the termination region; the superjun...

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PUM

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Abstract

A superjunction device is disclosed. A protective epoxy film surrounding the periphery of the charge flow region is provided, so that both the JFET region and the source region can be fully injected,the transverse dimension of the second contact hole in the transition region is larger than the minimum transverse dimension of the first contact hole in the charge flow region, and ensures that the second contact hole has a smaller aspect ratio under the condition that the second contact hole passes through one more layer of protective epoxy film than the first contact hole, Thus, the area of thesecond contact hole can be increased to improve the carrier collection capacity of the transition region, and the aspect ratio of the second contact hole can be reduced to make the second contact hole with a deeper depth be pinhole-free filled with metal. The invention also discloses a manufacturing method of a superjunction device. The invention can improve the anti-avalanche breakdown ability of the device, simultaneously can prevent the metal-filled pinhole from appearing in the contact hole in the transition region, improve the reliability of the device, reduce the photolithography leveland reduce the process cost.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing a superjunction device. Background technique [0002] In existing super junction devices, in the current flow area, there are alternately arranged P-type columns and N-type columns. Taking strip-shaped P-N columns that are alternately arranged P-type columns and N-type columns as an example, each N There is a polysilicon gate above the pillar, which can partially cover the surrounding P pillars or not. There is a P-type well (P Well) above each P-type well, and there is an N+ source region in the P-type well , there is a contact hole, the source metal is connected to the source region through the contact hole, the source metal is connected to the P region, that is, the P-type well, through a high-concentration P+ contact region, and the source metal is the front metal layer that constitutes the source . [0003] There is...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/78H01L21/336
CPCH01L29/0634H01L29/66712H01L29/7803
Inventor 肖胜安曾大杰李东升郑怡
Owner SHENZHEN SANRISE TECH CO LTD
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