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Time alternate sampling system based on time error adaptive correction

A time-alternating sampling, time-error technology, applied in physical parameter compensation/prevention, analog-to-digital converters, electrical components, etc.

Active Publication Date: 2019-02-12
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In the existing mismatch error correction methods, it is relatively easy for gain error and offset error, but the time error is a thorny problem, which is a major bottleneck of the time-alternating sampling technique

Method used

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  • Time alternate sampling system based on time error adaptive correction
  • Time alternate sampling system based on time error adaptive correction
  • Time alternate sampling system based on time error adaptive correction

Examples

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Embodiment

[0106] In order to better illustrate the technical solution of the present invention, a specific example is used to describe the present invention in detail.

[0107] Figure 5 is a structural diagram of the time-alternate sampling system in this embodiment. Such as Figure 5 As shown, in this embodiment, the time-alternating sampling system is configured with 4 ADC modules, that is, there are 4 channels of sampling signals x 0 [n],x 1 [n],x 2 [n],x 3 [n], the clock phases of the four sampling signals are 0°, 90°, 180°, and 270° in one sampling period. In this embodiment, the four ADC modules use the same sampling clock source, and a phase adjuster is configured inside the ADC module for phase adjustment.

[0108] It can be seen that in this embodiment, there are 5 reference signals x 0 [n-1],x 0 [n],x 1 [n-1],,x 2 [n-1],x 3 [n-1]. First, the reference signal distribution scheme needs to be determined by the reference signal distribution module 3, and the specific ...

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Abstract

The invention discloses a time alternate sampling system based on time error adaptive correction. M sampling signals sampled by M ADC modules are respectively delayed by using a time delayer, the sampling signal and a delayed sampling signal of the first ADC module and the delayed sampling signals of the other ADC modules are used as reference signals, the reference signals are sent to a corresponding time error estimation module according to a predetermined reference signal distribution scheme to perform time error estimation of the corresponding sampling signals, a phase control module receives a time error estimation result, calculates a phase correction value and corrects the sampling clock phases of the corresponding ADC modules, and a data splicing module performs data recombinationon the M sampling signals to obtain a final sampling signal. According to the time alternate sampling system disclosed by the invention, for the time mismatch error between multi-channel sampling signals, the time error is dynamically eliminated via time error adaptive correction, which is conducive to the accurate restoration of signals.

Description

technical field [0001] The invention belongs to the technical field of time-alternating sampling, and more specifically relates to a time-alternating sampling system based on time error self-adaptive elimination. Background technique [0002] With the rapid development of modern communications, smart cars, aerospace exploration, artificial intelligence and other related electronic information fields, the application of ultra-high frequency signals has grown rapidly. In order to accurately identify and measure these high-speed signals, the sampling rate of the data acquisition system is proposed. higher requirements. Since the existing single-chip ADC (Analog-to-digital converter, analog-to-digital converter) solution is limited by materials, processes, etc., it is difficult to meet the demand for high-speed acquisition. Therefore, the parallel acquisition technology has been extensively studied as a real-time acquisition technology for arbitrary signals, and the time-altern...

Claims

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Application Information

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IPC IPC(8): H03M1/06H03M1/12
CPCH03M1/0624H03M1/1215
Inventor 叶芃高舰曾浩黄武煌宋金鹏魏文韬赵禹潘志翔
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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