Time Alternate Sampling System Based on Time Error Adaptive Elimination
A time-alternating sampling, time-error technology, applied in the direction of physical parameter compensation/prevention, analog/digital conversion, code conversion, etc., to achieve the effect of helping to accurately restore and eliminate time errors
Active Publication Date: 2021-06-04
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology
In the existing mismatch error correction methods, it is relatively easy for gain error and offset error, but the time error is a thorny problem, which is a major bottleneck of the time-alternating sampling technique
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Embodiment
[0106] In order to better illustrate the technical solution of the present invention, a specific example is used to describe the present invention in detail.
[0107] Figure 5 is a structural diagram of the time-alternate sampling system in this embodiment. Such as Figure 5 As shown, in this embodiment, the time-alternating sampling system is configured with 4 ADC modules, that is, there are 4 channels of sampling signals x 0 [n],x 1 [n],x 2 [n],x 3 [n], the clock phases of the four sampling signals are 0°, 90°, 180°, and 270° in one sampling period. In this embodiment, the four ADC modules use the same sampling clock source, and a phase adjuster is configured inside the ADC module for phase adjustment.
[0108] It can be seen that in this embodiment, there are 5 reference signals x 0 [n-1], x 0 [n],x 1 [n-1],,x 2 [n-1],x 3 [n-1]. First, the reference signal distribution scheme needs to be determined by the reference signal distribution module 3, and the specific...
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The invention discloses a time-alternating sampling system based on time error self-adaptive elimination. For M sampling signals obtained by sampling M ADC modules, a digital delayer is used to delay time respectively, and the sampling signal of the first ADC module is And the delayed sampling signal and the delayed sampling signal of other ADC modules are used as the reference signal, and the reference signal is sent to the corresponding time error estimation module according to the predetermined reference signal distribution scheme to estimate the time error of the corresponding sampling signal, and the phase The control module receives the time error estimation result and calculates the phase correction value, corrects the sampling clock phase of the corresponding ADC module, and the data combination module reorganizes the M sampling signals to obtain the final sampling signal. Aiming at the time mismatch error between multi-channel sampling signals, the present invention adopts time error self-adaptive correction to dynamically eliminate the time error, which is helpful for accurate restoration of signals.
Description
technical field [0001] The invention belongs to the technical field of time-alternating sampling, and more specifically relates to a time-alternating sampling system based on time error self-adaptive elimination. Background technique [0002] With the rapid development of modern communications, smart cars, aerospace exploration, artificial intelligence and other related electronic information fields, the application of ultra-high frequency signals has grown rapidly. In order to accurately identify and measure these high-speed signals, the sampling rate of the data acquisition system is proposed. higher requirements. Since the existing single-chip ADC (Analog-to-digital converter, analog-to-digital converter) solution is limited by materials, processes, etc., it is difficult to meet the demand for high-speed acquisition. Therefore, the parallel acquisition technology has been extensively studied as a real-time acquisition technology for arbitrary signals, and the time-altern...
Claims
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IPC IPC(8): H03M1/06H03M1/12
CPCH03M1/0624H03M1/1215
Inventor 叶芃高舰曾浩黄武煌宋金鹏魏文韬赵禹潘志翔
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA