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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, which are applied in the manufacture of semiconductor/solid-state devices, transistors, electrical components, etc., can solve the problem of large parasitic capacitance of devices, and achieve the effect of reducing parasitic capacitance and good electrical performance.

Active Publication Date: 2021-03-09
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0007] The main purpose of the present application is to provide a semiconductor device and its manufacturing method to solve the problem of large parasitic capacitance of the device caused by the etch stop layer in the prior art

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0023] It should be pointed out that the following detailed description is exemplary and intended to provide further explanation to the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0024] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly dictates otherwise, the singular is intended to include the plural, and it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, they mean There are features, steps, operations, means, components and / or combinations thereof.

[0025] It will be understood that when an element such as a layer, film, region, or substrate is referred to as ...

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Abstract

The application provides a semiconductor device and a manufacturing method thereof. The manufacturing method includes: forming a first preliminary semiconductor structure, the preliminary semiconductor structure includes an NMOS region and a PMOS region, and the exposed surfaces of the NMOS region and the PMOS region have grooves; setting an etching stop layer on the exposed surface of the first preliminary semiconductor structure , the etch stop layer comprises a compound formed of tantalum, nitrogen and non-tantalum metal. In this manufacturing method, an etch stop layer is provided on the exposed surface with grooves, the etch stop layer includes a compound formed of tantalum, nitrogen and a non-tantalum metal, and the resistivity of the etch stop layer is compared to that in the prior art Ta 3 N 5 Lower, thereby reducing the parasitic capacitance in the gate stack in the prior art, so that the electrical performance of the device is better.

Description

technical field [0001] The present application relates to the field of semiconductors, and in particular, to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the development of integrated circuit technology to smaller nodes, the filling of metal gates in the gate-last process of CMOS technology encounters great challenges. The traditional physical vapor deposition technology has its inherent limitations. For a structure with a large aspect ratio, it cannot achieve uniform and effective filling and coverage of the entire pattern structure, resulting in huge non-uniformity of the threshold voltage of CMOS devices. [0003] In CMOS fabrication, for NMOS and PMOS, materials with different work functions are required as work function metals to control Vt. Usually, the P-type metal is grown first, and then the P-type metal is subjected to area-selective corrosion to re-grow the N-type metal. For the corrosion process of work function ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8238H01L27/092
CPCH01L21/823842H01L27/092
Inventor 项金娟王晓磊李亭亭王文武赵超
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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