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Ultra-low voltage LDO circuit

A technology of ultra-low voltage and power supply circuits, applied in the direction of adjusting electrical variables, instruments, control/regulation systems, etc., can solve the problems that LDO circuits are not compatible with low ripple, high power supply rejection ratio and energy conversion efficiency, etc., to reduce the minimum input Voltage standard, increase the working voltage range, and improve the effect of energy conversion efficiency

Active Publication Date: 2019-06-11
HUAZHONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The invention provides an ultra-low voltage LDO circuit, which is used to solve the problem that the existing LDO circuit cannot be compatible with low ripple, high power supply rejection ratio and energy conversion efficiency when outputting at low voltage

Method used

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Examples

Experimental program
Comparison scheme
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Embodiment 1

[0040] An ultra-low voltage LDO circuit 100, such as figure 1 As shown, including: interconnected LDO circuit and power circuit. The power supply circuit is also used to connect an external input power supply, and is used to receive the input voltage of the input power supply, and when the input voltage is lower than the first preset reference voltage, perform multiple step-up processing on the input voltage to obtain the first target voltage and Input to the LDO circuit; when the input voltage is higher than the first preset reference voltage, the input voltage is sequentially stabilized and multiple boosted to obtain the second target voltage and input to the LDO circuit, wherein the first target voltage and The second target voltage is used to supply power to the LDO circuit; the LDO circuit is also used for external input power supply and load, used to receive the input voltage, and based on the second preset reference voltage, process the input voltage to obtain the requi...

Embodiment 2

[0044] On the basis of Example 1, as figure 2 As shown, the power supply circuit includes: a voltage regulator circuit and a boost circuit. A voltage stabilizing and regulating circuit, which is externally connected to an input power supply, is used to receive an input voltage, and when the input voltage is lower than the first preset reference voltage, input the input voltage to the boost circuit; when the input voltage is higher than the first preset reference voltage When the value of the input voltage is stabilized to the value of the first preset reference voltage, a new input voltage is obtained and input to the boost circuit; the boost circuit is connected with the LDO circuit, and is used for inputting the voltage regulator circuit The input voltage is boosted multiple times to obtain the first target voltage or the second target voltage and input it to the LDO circuit.

[0045] preferred, such as image 3 As shown, the voltage regulation circuit includes: a first e...

Embodiment 3

[0056] On the basis of embodiment one or embodiment two, such as Figure 4 and Figure 5 As shown, the LDO circuit includes: a second error amplifier, a second power transistor, and a second feedback resistor network. The input end of the second error amplifier is connected to the power supply circuit, and the output end is connected to the gate of the second power transistor; the negative pole of the second error amplifier is connected to the second feedback resistor network or an external power supply of the second preset reference voltage, and the positive pole is externally connected to the second power supply. Two preset reference voltage power sources or connected to the first feedback resistor network; the source or drain of the second power transistor is connected to an external input power supply, and the drain or source is connected to the second feedback resistor network and an external load; the second feedback resistor network is also connected external load.

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PUM

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Abstract

The invention relates to an ultra-low voltage LDO circuit, comprising an LDO circuit and a power supply circuit, wherein the power supply circuit is externally connected with an input power supply andused for receiving an input voltage of the input power supply, boosting the input voltage to obtain a target voltage, when the input voltage is lower than a first preset reference voltage, when the input voltage is higher than the first preset reference voltage, performing voltage stabilization and boosting on the input voltage in sequence to obtain the target voltage, and finally inputting the target voltage to the LDO circuit; and the LDO circuit is externally connected with the input power supply and a load and used for receiving the input voltage and the target voltage, obtaining a required voltage based on the input voltage and the target voltage and inputting the required voltage to the load. According to the ultra-low voltage LDO circuit provided by the invention, a lightweight locally generated power supply is imported in the LDO circuit, when the voltage of the input power supply is relatively low, the supply voltage is boosted, and when the voltage of the input power supplyis relatively high, the supply voltage is stabilized, so that the LDO circuit can work in a working environment within an ultra-low or wide voltage range, and a ripple wave and high power supply rejection ratio is ensured while improving the energy conversion efficiency.

Description

technical field [0001] The invention relates to the technical field of LDO, in particular to an ultra-low voltage LDO circuit. Background technique [0002] With the rapid development of consumer electronic devices and the Internet of Things, there is a great demand for power management chips with higher efficiency, smaller area, and lower power consumption. Since the lower power supply voltage for the power management chip can make the circuit work in the near-threshold voltage and sub-threshold voltage regions, a large number of designs can prove that when the power supply is lower than 0.5V, the dynamic power consumption and static power consumption will be reduced. , so that the circuit can obtain the maximum energy conversion efficiency. Therefore, this means that it is necessary to reduce the supply voltage of these chips, that is, the output voltage of an LDO (low dropout regulator, low dropout linear regulator). [0003] Reducing the output voltage of the LDO is an...

Claims

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Application Information

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IPC IPC(8): G05F1/56
Inventor 谭旻杨超
Owner HUAZHONG UNIV OF SCI & TECH