Semiconductor device and manufacturing method thereof

Abstract

The invention discloses a semiconductor device and a manufacturing method thereof. A first bonding layer and a second bonding layer of the semiconductor device are in contact with each other to provide bonding between a first wafer and a second wafer. The contact surface of the first bonding layer and the second bonding layer is a bonding surface. A first conductive channel and a second conductivechannel are connected to each other to provide an electrical connection between the first wafer and the second wafer. The first wafer further comprises a first pseudo channel penetrating through thefirst bonding layer, and the second wafer further comprises a second pseudo channel penetrating through the second bonding layer, wherein the first pseudo channel and the second pseudo channel are incontact with each other to improve the mechanical connection bonding force between the first wafer and the second wafer. According to the semiconductor device, the pseudo channels connected with eachother are formed in the bonding layers of the first wafer and the second wafer to improve the pattern distribution of the bonding surfaces of the first wafer and the second wafer, so that the bondingstrength and reliability are improved.

Description

technical field [0001] The present invention relates to semiconductor technology, and more particularly, to a semiconductor device and a manufacturing method thereof. Background technique [0002] The development direction of semiconductor technology is the reduction of feature size and the improvement of integration. For storage devices, the improvement of the storage density of the storage device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. [0003] In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. The 3D storage device includes a plurality of storage units stacked along the vertical direction, the integration degree can be doubled on a unit area wafer, and the cost can be reduced. Further,...

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Problems solved by technology

[0006] However, in the above-mentioned semiconductor devices, due to the complex structure of the 3D memory device chip, there are problems of poor bonding strength and reliability, and it is desired to further improve the wafer bonding process to increase the bonding strength and reliability.

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