Enhanced semiconductor transistor and preparation method thereof

Abstract

The invention relates to an enhanced semiconductor transistor and a preparation method thereof. The enhanced semiconductor transistor comprises a substrate, a semiconductor epitaxial layer, a gate electrode, a source electrode and a drain electrode, wherein the semiconductor epitaxial layer are grown on the substrate; and the epitaxial layer comprises a nitride nucleating layer, a nitride stress buffer layer, a nitride channel layer, a primary epitaxial nitride barrier layer, a p-type nitride layer and a secondary epitaxial nitride barrier layer. Through region selection etching, p-type nitride in a gate region is reserved to turn off the gate electrode; and through region selection secondary epitaxy after masking, the secondary epitaxial nitride barrier layer is grown on the primary epitaxial nitride barrier layer, so that the connectivity of an access region is improved. The thicknesses and the components of the primary epitaxial nitride barrier layer and the secondary epitaxial nitride barrier layer are regulated and controlled, so that better gate turn-off capability and high conductivity of the access region are achieved. According to the method, the requirements for an etching process are reduced, and the etching damage can be effectively repaired. Finally, the enhanced semiconductor transistor with high threshold voltage, high conductivity and high stability can be realized.

Description

technical field [0001] The present invention relates to the technical field of semiconductor devices, in particular to an enhanced semiconductor transistor and a preparation method thereof. Background technique [0002] The third-generation semiconductor materials represented by GaN materials have great room for development in high-temperature, high-frequency, radiation-resistant, and high-power applications due to their advantages such as wide bandgap, high thermal conductivity, and high breakdown electric field. [0003] GaN-based electronic devices usually use the two-dimensional electron gas with high concentration and high mobility at the interface of AlGaN / GaN heterostructure to work, so that the device has the advantages of small on-resistance, large output current, and fast switching speed. However, it is precisely because of this AlGaN / GaN heterostructure (high two-dimensional electron gas, 2DEG) that the device is naturally turned on when the external gate bias is ...

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Problems solved by technology

However, due to the influence of epitaxial growth kinetics, when the gate length of the device is small, that is to say, when the growth window is very narrow, the growth of p-GaN materials will be difficult to control and the doping will be uneven. No breakthroughs have been made in this area

In addition, the hole concentration of the p-GaN layer is generally not high, and the current mainstream reported value is basically no higher than 1×10 18 cm -3 , so the Al composition and thickness of the AlGaN barrier layer in the AlGaN / GaN heterostructure below the p-GaN layer are generally small, generally less than 20% composition and less than 18nm thickness, which is conducive to achieving enhanced operation , but at the same time it will lead to an increase in the resistance of the access region, and the relatively thin AlGaN barrier layer will also make it easier for doping elements (such as magnesium) in the p-GaN layer to diffuse into the channel, thereby affecting the reliability of the device sex

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