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Vertical nanowire transistor and forming method thereof

A transistor and nanowire technology, applied in the field of vertical nanowire transistors and their formation, can solve the problems of increasing difficulty of multi-threshold voltage transistors and the like

Active Publication Date: 2019-08-13
ICLEAGUE TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004]However, for vertical nanowire transistors, the difficulty of forming multi-threshold voltage transistors increases

Method used

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  • Vertical nanowire transistor and forming method thereof
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  • Vertical nanowire transistor and forming method thereof

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Embodiment Construction

[0050] As mentioned in the background art, it is quite difficult to form vertical nanowire transistors with multiple threshold voltages in the prior art.

[0051] After research, it is found that in the embodiment of the planar transistor or the fin field effect transistor, the threshold voltage of the transistor can be adjusted by performing ion implantation on the channel region of the transistor. However, for vertical nanowire transistors, since the channel length direction in the transistor is perpendicular to the substrate surface, it is difficult to adjust the threshold voltage by traditional ion implantation technology, and it is difficult to achieve a direction parallel to the substrate surface. The channel region of the vertical nanowire transistor is implanted with ions.

[0052] In order to solve the above problems, the present invention provides a vertical nanowire transistor. By forming a first work function layer on the sidewall of the first channel column, a se...

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Abstract

The invention discloses a vertical nanowire transistor and a forming method thereof. The forming method comprises the following steps: providing a substrate, wherein a plurality of channel columns arearranged on the surface of the substrate, the plurality of channel columns are perpendicular to the surface of the substrate, the plurality of channel columns comprise a plurality of first channel columns and a plurality of second channel columns, the first channel columns and the second channel columns are used for forming transistors of a first conduction type, the first channel columns are internally provided with first channel regions, and the second channel columns are internally provided with second channel regions; forming a first gate dielectric layer on the surface of the side wall of the first channel region of the first channel column; forming a second gate dielectric layer on the surface of the side wall of the second channel region of the second channel column; forming a first work function structure on the surface of the first gate dielectric layer; and forming a second work function structure on the surface of the second gate dielectric layer, wherein the work functionof the second work function structure is different from the work function of the first work function structure. The formed vertical nanowire transistor has a multi-threshold voltage.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a vertical nanowire transistor and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short-channel effect of the transistor and suppress the leakage current, the prior art proposes a vertical nanowi...

Claims

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Application Information

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IPC IPC(8): H01L29/10H01L29/423H01L29/06H01L21/33B82Y10/00
CPCH01L29/1037H01L29/4232H01L29/42364H01L29/66477H01L29/0603H01L29/0684H01L29/0669B82Y10/00
Inventor 周华
Owner ICLEAGUE TECH CO LTD