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Laminated inductor and manufacturing method thereof

A manufacturing method and inductor technology, applied in the direction of inductors, circuits, electrical components, etc., can solve the problems of high process cost of laminated inductors, large inductance resistance, etc., to save photomasks and metal deposition processes, reduce resistance, The effect of connecting a low resistance

Active Publication Date: 2019-09-13
福建省福联集成电路有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] Therefore, it is necessary to provide a laminated inductor and a manufacturing method to solve the problems of high process cost and large inductance resistance of existing laminated inductors

Method used

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  • Laminated inductor and manufacturing method thereof
  • Laminated inductor and manufacturing method thereof
  • Laminated inductor and manufacturing method thereof

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Embodiment Construction

[0043] In order to describe in detail the technical content, structural features, achieved objectives and effects of the technical solution, the following detailed description is given in conjunction with specific embodiments and accompanying drawings.

[0044] see Figure 1 to Figure 6 , this embodiment provides a method for fabricating a stacked inductor. This method can be fabricated on a semiconductor device 1. The semiconductor device can be a gallium arsenide epitaxy and a substrate. The semiconductor device includes an active device region and a passive device region, and the active device is not used. For the fabrication of transistors (including source, drain and gate), the passive device region is used to fabricate inductors, and the passive device region is subjected to insulation treatment before fabrication to form an insulating region, which is generally formed by ion implantation. The method includes the following steps: first, a first photoresist layer is fabri...

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Abstract

The invention discloses a laminated inductor and a manufacturing method thereof. The manufacturing method comprises the following steps of manufacturing a first photoresist layer on a semiconductor device, and performing exposure development on source metal, drain metal and inductor bottom layer metal, wherein the inductor bottom layer metal is located in an insulating area of the semiconductor device; carrying out deposition on source metal, drain metal and inductor bottom layer metal of a transistor; removing the first photoresist layer, depositing a first protection layer, and etching openings in the gate position, the source metal, the drain metal and the inductor bottom layer metal; manufacturing a second photoresist layer, and performing exposure development on the gate position, thesource metal, the drain metal and the inductor bottom layer metal; and carrying out deposition on the gate metal, the source laminated layer metal, the drain laminated layer metal and the inductor laminated layer metal. Compared with a process before improvement, the scheme has the advantages that the photomask and the metal deposition process are saved, and meanwhile, the internal resistance ofthe inductor is lowered.

Description

technical field [0001] The invention relates to the technical field of semiconductor inductor fabrication, in particular to a stacked inductor and a fabrication method. Background technique [0002] At present, in integrated circuits, the existing HEMT (High Electron Mobility Transistor, High Electron Mobility Transistor) process technology is used as the inductor in the passive device. The general process will first complete the transistor gate and source and drain of the active device, and then Do passive device resistors, capacitors, inductors. According to the manufacturing method of the multilayer inductor in the prior art, it is made of two layers of metal stacks. The manufacturing process is as follows: [0003] 1. Fabricate the source, drain, and ohmic contact (Source and drain ohmic contact) of the active device HEMT, referred to as (SDOC). [0004] 2. The gate Schottky Contact (GSC) of the active device HEMT is fabricated. [0005] 3. Make the first layer of Sil...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/64H01L21/335H01L29/778
CPCH01L28/10H01L29/66462H01L29/778
Inventor 林张鸿林豪詹智梅王潮斌肖俊鹏陈东仰郑育新
Owner 福建省福联集成电路有限公司
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