How to make embedded flash memory
A manufacturing method and embedded technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of increased manufacturing costs and multiple layers of photomasks
Active Publication Date: 2021-09-24
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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[0004] The object of the present invention is to provide a method for manufacturing embedded flash memory, which is used to solve the problem in the prior art that there are many photomask layers used in the preparation process of embedded flash memory integrated with the BCD process, resulting in increased preparation costs.
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[0037]The bearing of the background art, the conventional embedded flash (eFlash) fabrication process technology combined with BCD many hierarchical method for manufacturing a photomask is prepared using the embedded flash memory, embedded flash preparing the present improved issue of cost. As follows, in conjunction with Figures 1a ~ 1h , The conventional method for fabricating embedded flash preparation combining with BCD process comprising the following process:
[0038] like Figure 1A Shown, there is provided a substrate 10, the substrate 10 includes a logic region and the storage region 10b 10a, distal end structure (not labeled) formed on the storage region 10a; the front end structure includes two floating gate structure, located source line between the two floating gate structure lead structure 23, and positioned within the storage area 10a of the substrate 10, the source line 20 and located between the two floating gate structure; the source line terminal structure 2320 i...
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The invention discloses a manufacturing method of an embedded flash memory, comprising: providing a base, the base includes a logic area and a storage area, and a front-end structure is formed on the storage area; performing ion implantation on the logic area to form a first device therein The first well region of the second device, the second well region of the second device and the drift region of the third device; sequentially form a gate oxide layer and a polysilicon layer covering the storage region and logic region, form a patterned second photoresist layer and use it As a mask, the polysilicon layer is etched for the first time to form an opening; an ion implantation process is performed on the opening to form the third well region of the third device; the patterned second photoresist layer is removed; the patterned The third photoresist layer is used as a mask to etch the polysilicon layer for the second time, so as to form word line gates on both sides of the front-end structure respectively, and form the first gate structure of the first device on the logic region, A second gate structure of the second device and a third gate structure of the third device. The invention reduces the preparation cost.
Description
Technical field [0001] The present invention relates to the technical field of producing the semiconductor, particularly to the method for manufacturing a monolithic integrated embedded flash memory technology. Background technique [0002] BCD is a monolithic process technology which can produce bipolar (Bipolar) on the same chip, complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) device and a double diffused metal oxide semiconductor (Double diffused metal oxide semiconductor, DMOS) device, which combines bipolar device with high transconductance, load drive capability and CMOS high integration, low power consumption advantages make it complement each other to play their respective advantages. More importantly, it integrates the DMOS power devices, DMOS can work in switching mode, power consumption is very low. Package does not require expensive cooling systems and power can be delivered to the load. Low power consumption is one of the main ...
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IPC IPC(8): H01L27/11524H01L27/11529H01L27/11531H10B41/35H10B41/41H10B41/42
CPCH10B41/41H10B41/42H10B41/35
Inventor 于涛
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP