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Process for reducing soldering hole rate of soldered printed board by adopting polytetrafluoroethylene block

A technology of polytetrafluoroethylene and printed boards, which is applied in manufacturing tools, welding equipment, metal processing, etc., can solve the problems of reducing the soldering void rate and high soldering void rate of soldered printed boards, so as to reduce product reliability risks, The effect of low process complexity and saving time for product assembly and rework

Inactive Publication Date: 2019-12-20
CHENGDU TIGER MICROWAVE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a process for reducing the welding void rate of soldered printed boards by using polytetrafluoroethylene blocks, which can effectively solve the defect of high welding void rate

Method used

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  • Process for reducing soldering hole rate of soldered printed board by adopting polytetrafluoroethylene block
  • Process for reducing soldering hole rate of soldered printed board by adopting polytetrafluoroethylene block
  • Process for reducing soldering hole rate of soldered printed board by adopting polytetrafluoroethylene block

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Embodiment Construction

[0018] The present invention will be further described below in conjunction with the drawings:

[0019] The process of reducing the welding void rate of welded printed boards by using PTFE blocks includes the following steps:

[0020] S1. Make a solder sheet corresponding to the printed board, put the tin sheet in the shell first, and then turn the printed board with the solder paste into the shell;

[0021] S2. Press the PTFE block corresponding to the printed board on the printed board, cover the cover on the shell and fix it with screws. At this time, the cover presses the PTFE block on the printed board. On board

[0022] S3. Heat welding. The PTFE block is heated and expanded during the heating process to apply a pressing force to the printed board. Under the action of the pressing force, the heated and melted solder is evenly distributed, thereby reducing the void ratio and improving the printed board Performance and reliability.

[0023] Preferably, the solder sheet is processe...

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Abstract

The invention discloses a process for reducing the soldering hole rate of a soldered printed board by adopting a polytetrafluoroethylene block. The process comprises the following steps of S1, manufacturing a soldering tin sheet corresponding to the printed board, placing the tin sheet in a shell firstly, then turning the printed board with a soldering flux coated to enable the front surface of the printed board to be upward, and feeding the printed board into the shell; S2, pressing the polytetrafluoroethylene block corresponding to the printed board on the printed board, covering the shell with a cover plate and fixing the cover plate with a screw; and S3, carrying out heating and welding treatment, wherein the polytetrafluoroethylene block is subjected to thermal expansion in the heating process to apply the pressing force to the printed board. The process has the beneficial effects that the pressing force is applied to the printed board by the polytetrafluoroethylene block which issubjected to thermal expansion in the heating process, and the heated and melted soldering tin is uniformly distributed under the action of the pressing force, so that the soldering hole rate of theprinted board is reduced, the performance and the reliability of the printed board are improved, the time for rework of product assembling is greatly saved, the soldering frequency is reduced, and theproduct reliability risk is reduced.

Description

Technical field [0001] The invention relates to the technical field of welding technology in electronic assembly technology, in particular to a process for reducing the welding void rate of welded printed boards by using polytetrafluoroethylene blocks. Background technique [0002] With the rapid development of electronic products, the high-power devices or PCB boards of many products will be directly butt-welded with the bottom of the cavity. How to make the butt-welding well and less voids and bubbles puts new requirements on the welding process. The current common soldering process is mainly to apply solder paste in the cavity and manual hot plate soldering. This method cannot solve the high proportion of voids or bubbles caused by the flux residue after the solder paste has melted. The penetration rate of the solder layer has an impact on the module. Its performance and long-term reliability have a direct impact. Holes in the soldering layer will form various impedances, caus...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B23K1/008B23K3/00H05K7/14
CPCB23K1/008B23K3/00H05K7/1417
Inventor 李枭嵘范海霞黄莉
Owner CHENGDU TIGER MICROWAVE TECH
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