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Silicon carbide CMOS (Complementary Metal-Oxide-Semiconductor) transistor and manufacturing method of silicon carbide CMOS structure

A manufacturing method and technology of silicon carbide, applied in transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as excessively high threshold voltage, limited application, and drop

Inactive Publication Date: 2020-01-31
SHENZHEN INST OF WIDE BANDGAP SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the structural layout in the prior art has certain problems. If a P-well process similar to silicon CMOS is used on the silicon carbide material, on the one hand, the ion-implanted P-well will greatly increase the carrier mobility of the NMOS tube. Decrease, affecting its conduction performance, on the other hand, the threshold voltage of PMOS is easy to be too high, which limits its practical application

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  • Silicon carbide CMOS (Complementary Metal-Oxide-Semiconductor) transistor and manufacturing method of silicon carbide CMOS structure
  • Silicon carbide CMOS (Complementary Metal-Oxide-Semiconductor) transistor and manufacturing method of silicon carbide CMOS structure
  • Silicon carbide CMOS (Complementary Metal-Oxide-Semiconductor) transistor and manufacturing method of silicon carbide CMOS structure

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Embodiment

[0047] An aspect of the embodiments of the present invention provides a silicon carbide CMOS structure. figure 1 It is a schematic diagram of the silicon carbide CMOS structure of the present invention. Such as Figure 1 As shown, the main structure of the PMOS transistor includes an N-type + substrate 1, above which are a P+-type isolation layer 2, a P-type isolation layer 4, an N+-type body contact layer 6, and an N-type body region 9. On both sides above the N-type body region 9 there is a P+ type source region 10 and a P+ type drain region 11; a gate dielectric 12 is located in the center above the N-type body region 9, and a gate electrode 13 is located on the gate dielectric. An integral electrode 14 is located on the N+ type body contact region 6 , a source electrode 15 is located on the P+ type source region 10 , and a drain electrode 16 is located on the P+ type drain region 11 .

[0048] The main structure of the NMOS transistor includes an N+ type substrate 1 , ab...

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Abstract

The invention belongs to the technical field of semiconductor integrated circuits and discloses a silicon carbide CMOS structure. A PMOS transistor mainly comprises an N type+ substrate as well as a P+ type isolation layer, a P type isolation layer, an N+ type body contact layer and an N type body region which are sequentially arranged on the N type+ substrate; a P+ type source region and a P+ type drain region are respectively arranged at two sides of the upper portion of the N type body region; a gate medium is located above the central position above the N type body region; a gate electrodeis located above the gate medium; a body electrode is located on the N+ type body contact region; a source electrode is located on the P+ type source region; and a drain electrode is located on the P+ type drain region. An NMOS transistor mainly comprises an N+ type substrate as well as a P+ type body contact region and a P type body region which are sequentially arranged on the N+ type substrate; an N+ type source region and an N+ type drain region are respectively arranged on two sides of the upper portion of the P type body region; a gate medium is located above the central position of theP type body region; and a gate electrode is located above the gate medium. The invention also provides a process method for preparing the silicon carbide CMOS structure.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and in particular relates to a silicon carbide CMOS transistor and a structure manufacturing method thereof. Background technique [0002] CMOS integrated circuit circuit is the English abbreviation of Complementary Metal-Oxide-Semiconductor (Complementary Metal-Oxide-Semiconductor), which is composed of insulated field effect transistors. Composed of MOS tubes. The CMOS structure has the advantages of low static power consumption, large logic swing, strong anti-interference ability, and fast speed. It is the cornerstone of large-scale integrated circuits. [0003] Silicon carbide wide bandgap semiconductor materials have excellent physical and chemical properties compared with traditional silicon materials, which makes silicon carbide materials have great application potential in the field of power semiconductors. At present, silicon carbide materials are mostly used ...

Claims

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Application Information

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IPC IPC(8): H01L27/092H01L29/06H01L29/10H01L21/8238
CPCH01L21/8238H01L27/092H01L29/0684H01L29/1079
Inventor 温正欣叶怀宇张新河陈施施张国旗
Owner SHENZHEN INST OF WIDE BANDGAP SEMICON